Lines Matching refs:tmplt_hdr
3680 struct qla82xx_md_template_hdr *tmplt_hdr; in qla82xx_minidump_process_control() local
3684 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3743 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3749 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3756 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3763 tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3773 read_value = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3780 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
4111 struct qla82xx_md_template_hdr *tmplt_hdr; in qla82xx_md_collect() local
4116 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4148 no_entry_hdr = tmplt_hdr->num_of_entries; in qla82xx_md_collect()
4153 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level); in qla82xx_md_collect()
4155 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_collect()
4164 tmplt_hdr->driver_capture_mask = ql2xmdcapmask; in qla82xx_md_collect()
4166 tmplt_hdr->driver_info[0] = vha->host_no; in qla82xx_md_collect()
4167 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) | in qla82xx_md_collect()
4177 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) { in qla82xx_md_collect()
4180 tmplt_hdr->entry_type); in qla82xx_md_collect()
4185 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4318 struct qla82xx_md_template_hdr *tmplt_hdr; in qla82xx_md_alloc() local
4320 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4323 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_alloc()
4331 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()