2607 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2100_pci_config()
2658 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2300_pci_config()
2659 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2668 		wrt_reg_word(&reg->ctrl_status, 0x0);  in qla2300_pci_config()
2669 		rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2689 	ha->pci_attr = rd_reg_word(&reg->ctrl_status);  in qla2300_pci_config()
2733 	ha->pci_attr = rd_reg_dword(&reg->ctrl_status);  in qla24xx_pci_config()
2851 		wrt_reg_word(&reg->ctrl_status, 0x20);  in qla2x00_reset_chip()
2852 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2865 		wrt_reg_word(&reg->ctrl_status, 0x10);  in qla2x00_reset_chip()
2866 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2884 		wrt_reg_word(&reg->ctrl_status, 0);  in qla2x00_reset_chip()
2885 		rd_reg_word(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2900 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_reset_chip()
2911 			if ((rd_reg_word(&reg->ctrl_status) &  in qla2x00_reset_chip()
3034 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
3036 		if ((rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)  in qla24xx_reset_risc()
3042 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE))  in qla24xx_reset_risc()
3048 	    rd_reg_dword(&reg->ctrl_status),  in qla24xx_reset_risc()
3049 	    (rd_reg_dword(&reg->ctrl_status) & CSRX_DMA_ACTIVE));  in qla24xx_reset_risc()
3051 	wrt_reg_dword(&reg->ctrl_status,  in qla24xx_reset_risc()
3077 	rd_reg_dword(&reg->ctrl_status);  in qla24xx_reset_risc()
3080 		if ((rd_reg_dword(&reg->ctrl_status) &  in qla24xx_reset_risc()
3086 	if (!(rd_reg_dword(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))  in qla24xx_reset_risc()
3092 	    rd_reg_dword(&reg->ctrl_status));  in qla24xx_reset_risc()
3291 	wrt_reg_word(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_chip_diag()
3298 	data = qla2x00_debounce_register(&reg->ctrl_status);  in qla2x00_chip_diag()
3301 		data = rd_reg_word(&reg->ctrl_status);  in qla2x00_chip_diag()
4930 		if ((rd_reg_word(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()