Lines Matching defs:scu_link_layer_registers

1263 struct scu_link_layer_registers {  struct
1265 u32 speed_negotiation_timers;
1267 u32 link_layer_status;
1269 u32 port_selector_timeout;
1270 u32 reserved0C;
1272 u32 timeout_unit_value;
1274 u32 rcd_timeout;
1276 u32 link_timer_timeouts;
1278 u32 sas_phy_timeouts;
1280 u32 received_address_frame_error_counter;
1282 u32 invalid_dword_counter;
1284 u32 transmit_identification;
1286 u32 sas_device_name_high;
1288 u32 sas_device_name_low;
1290 u32 source_sas_address_high;
1292 u32 source_sas_address_low;
1294 u32 identify_frame_phy_id;
1296 u32 identify_frame_reserved;
1298 u32 received_address_frame;
1300 u32 maximum_arbitration_wait_timer_timeout;
1302 u32 transmit_primitive;
1304 u32 error_counter_event_notification_control;
1306 u32 frxq_payload_fill_threshold;
1308 u32 link_layer_hang_detection_timeout;
1309 u32 reserved_5C;
1311 u32 received_frame_count;
1313 u32 transmit_frame_count;
1315 u32 received_dword_count;
1317 u32 transmit_dword_count;
1319 u32 loss_of_sync_error_count;
1321 u32 running_disparity_error_count;
1323 u32 received_frame_crc_error_count;
1325 u32 stp_control;
1327 u32 phy_configuration;
1329 u32 clock_skew_management;
1331 u32 transmit_comwake_signal;
1333 u32 transmit_cominit_signal;
1335 u32 transmit_comsas_signal;
1337 u32 cominit_control;
1339 u32 comwake_control;
1341 u32 comsas_control;
1343 u32 received_short_frame_count;
1345 u32 received_frame_without_credit_count;
1347 u32 received_frame_after_done_count;
1349 u32 phy_reset_problem_count;
1351 u32 counter_control;
1353 u32 ssp_timer_timeout_values;
1355 u32 ftx_control;
1357 u32 frx_control;
1359 u32 ftx_watermark;
1361 u32 notify_enable_spinup_control;
1363 u32 sas_training_sequence_timer_values;
1365 u32 phy_capabilities;
1367 u32 phy_control;
1368 u32 reserved_d4;
1370 u32 link_layer_control;
1372 u32 afe_xcvr_control;
1374 u32 afe_lookup_table_control;
1376 u32 phy_source_zone_group_control;
1378 u32 receive_phycap;
1379 u32 reserved_ec;
1381 u32 speed_negotiation_afe_rx_reset_control;
1383 u32 power_management_control;
1385 u32 sas_pm_partial_request_primitive;
1387 u32 sas_pm_slumber_request_primitive;
1389 u32 sas_pm_ack_primitive_register;
1391 u32 sas_pm_nak_primitive_register;
1393 u32 sas_primitive_timeout;
1394 u32 reserved_10c;
1396 u32 pla_product_control[4];
1398 u32 pla_product_sum;
1400 u32 pla_control;
1402 u32 reserved_0128_037f[0x96];