Lines Matching refs:r4
22 stmfd sp!, {r4 - r7, lr}
29 ldmia r0!, {r3, r4, r5, r6}
31 orr r3, r3, r4, lsl #16
32 and r4, r5, lr
33 orr r4, r4, r6, lsl #16
41 LOADREGS(fd, sp!, {r4 - r7, pc})
45 ldmia r0!, {r3, r4, r5, r6}
47 orr r3, r3, r4, lsl #16
48 and r4, r5, lr
49 orr r4, r4, r6, lsl #16
50 stmia r1!, {r3 - r4}
51 LOADREGS(eqfd, sp!, {r4 - r7, pc})
56 ldmia r0!, {r3, r4}
58 orr r3, r3, r4, lsl #16
60 LOADREGS(eqfd, sp!, {r4 - r7, pc})
69 LOADREGS(fd, sp!, {r4 - r7, pc})
76 stmfd sp!, {r4 - r6, lr}
81 ldmia r1!, {r4, r6, ip, lr}
82 mov r3, r4, lsl #16
84 mov r4, r4, lsr #16
85 orr r4, r4, r4, lsl #16
90 stmia r0!, {r3, r4, r5, r6}
93 mov r4, ip, lsr #16
94 orr r4, r4, r4, lsl #16
99 stmia r0!, {r3, r4, ip, lr}
101 LOADREGS(fd, sp!, {r4 - r6, pc})
105 ldmia r1!, {r4, r6}
106 mov r3, r4, lsl #16
108 mov r4, r4, lsr #16
109 orr r4, r4, r4, lsl #16
114 stmia r0!, {r3, r4, r5, r6}
115 LOADREGS(eqfd, sp!, {r4 - r6, pc})
120 ldr r4, [r1], #4
121 mov r3, r4, lsl #16
123 mov r4, r4, lsr #16
124 orr r4, r4, r4, lsl #16
125 stmia r0!, {r3, r4}
126 LOADREGS(eqfd, sp!, {r4 - r6, pc})
134 LOADREGS(fd, sp!, {r4 - r6, pc})