888 static void keembay_gpio_invert(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_gpio_invert()  argument
890 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_invert()
899 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_invert()
902 static void keembay_gpio_restore_default(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_gpio_restore_default()  argument
904 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_restore_default()
907 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_restore_default()
913 	struct keembay_pinctrl *kpc = pinctrl_dev_get_drvdata(pctldev);  in keembay_request_gpio()  local
916 	if (pin >= kpc->npins)  in keembay_request_gpio()
919 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_request_gpio()
932 	struct keembay_pinctrl *kpc = pinctrl_dev_get_drvdata(pctldev);  in keembay_set_mux()  local
951 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_set_mux()
953 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_set_mux()
958 static u32 keembay_pinconf_get_pull(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_pinconf_get_pull()  argument
960 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_pull()
965 static int keembay_pinconf_set_pull(struct keembay_pinctrl *kpc, unsigned int pin,  in keembay_pinconf_set_pull()  argument
968 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_pull()
971 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_pull()
976 static int keembay_pinconf_get_drive(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_pinconf_get_drive()  argument
978 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_drive()
987 static int keembay_pinconf_set_drive(struct keembay_pinctrl *kpc, unsigned int pin,  in keembay_pinconf_set_drive()  argument
990 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_drive()
995 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_drive()
1000 static int keembay_pinconf_get_slew_rate(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_pinconf_get_slew_rate()  argument
1002 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_slew_rate()
1007 static int keembay_pinconf_set_slew_rate(struct keembay_pinctrl *kpc, unsigned int pin,  in keembay_pinconf_set_slew_rate()  argument
1010 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_slew_rate()
1017 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_slew_rate()
1022 static int keembay_pinconf_get_schmitt(struct keembay_pinctrl *kpc, unsigned int pin)  in keembay_pinconf_get_schmitt()  argument
1024 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_get_schmitt()
1029 static int keembay_pinconf_set_schmitt(struct keembay_pinctrl *kpc, unsigned int pin,  in keembay_pinconf_set_schmitt()  argument
1032 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_schmitt()
1039 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_pinconf_set_schmitt()
1047 	struct keembay_pinctrl *kpc = pinctrl_dev_get_drvdata(pctldev);  in keembay_pinconf_get()  local
1051 	if (pin >= kpc->npins)  in keembay_pinconf_get()
1056 		if (keembay_pinconf_get_pull(kpc, pin) != KEEMBAY_GPIO_DISABLE)  in keembay_pinconf_get()
1061 		if (keembay_pinconf_get_pull(kpc, pin) != KEEMBAY_GPIO_PULL_UP)  in keembay_pinconf_get()
1066 		if (keembay_pinconf_get_pull(kpc, pin) != KEEMBAY_GPIO_PULL_DOWN)  in keembay_pinconf_get()
1071 		if (keembay_pinconf_get_pull(kpc, pin) != KEEMBAY_GPIO_BUS_HOLD)  in keembay_pinconf_get()
1076 		if (!keembay_pinconf_get_schmitt(kpc, pin))  in keembay_pinconf_get()
1081 		val = keembay_pinconf_get_slew_rate(kpc, pin);  in keembay_pinconf_get()
1086 		val = keembay_pinconf_get_drive(kpc, pin);  in keembay_pinconf_get()
1100 	struct keembay_pinctrl *kpc = pinctrl_dev_get_drvdata(pctldev);  in keembay_pinconf_set()  local
1105 	if (pin >= kpc->npins)  in keembay_pinconf_set()
1114 			ret = keembay_pinconf_set_pull(kpc, pin, KEEMBAY_GPIO_DISABLE);  in keembay_pinconf_set()
1118 			ret = keembay_pinconf_set_pull(kpc, pin, KEEMBAY_GPIO_PULL_UP);  in keembay_pinconf_set()
1122 			ret = keembay_pinconf_set_pull(kpc, pin, KEEMBAY_GPIO_PULL_DOWN);  in keembay_pinconf_set()
1126 			ret = keembay_pinconf_set_pull(kpc, pin, KEEMBAY_GPIO_BUS_HOLD);  in keembay_pinconf_set()
1130 			ret = keembay_pinconf_set_schmitt(kpc, pin, arg);  in keembay_pinconf_set()
1134 			ret = keembay_pinconf_set_slew_rate(kpc, pin, arg);  in keembay_pinconf_set()
1138 			ret = keembay_pinconf_set_drive(kpc, pin, arg);  in keembay_pinconf_set()
1182 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_get()  local
1185 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_get()
1188 	return keembay_read_pin(kpc->base0 + offset, pin);  in keembay_gpio_get()
1193 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_set()  local
1196 	reg_val = keembay_read_gpio_reg(kpc->base0 + KEEMBAY_GPIO_DATA_OUT, pin);  in keembay_gpio_set()
1199 				       kpc->base0 + KEEMBAY_GPIO_DATA_HIGH, pin);  in keembay_gpio_set()
1202 				       kpc->base0 + KEEMBAY_GPIO_DATA_LOW, pin);  in keembay_gpio_set()
1207 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_get_direction()  local
1208 	unsigned int val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_get_direction()
1215 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_set_direction_in()  local
1218 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_in()
1220 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_in()
1228 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_set_direction_out()  local
1231 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_out()
1233 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin);  in keembay_gpio_set_direction_out()
1245 	struct keembay_pinctrl *kpc;  in keembay_gpio_irq_handler()  local
1258 	kpc = gpiochip_get_data(gc);  in keembay_gpio_irq_handler()
1261 	reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_irq_handler()
1270 		val = keembay_read_pin(kpc->base0 + KEEMBAY_GPIO_DATA_IN, pin);  in keembay_gpio_irq_handler()
1284 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_clear_irq()  local
1286 	struct keembay_gpio_irq *irq = &kpc->irq[src];  in keembay_gpio_clear_irq()
1294 	val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_clear_irq()
1297 	keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_clear_irq()
1303 		keembay_gpio_restore_default(kpc, pin);  in keembay_gpio_clear_irq()
1306 		kpc->max_gpios_level_type++;  in keembay_gpio_clear_irq()
1308 		kpc->max_gpios_edge_type++;  in keembay_gpio_clear_irq()
1311 static int keembay_find_free_slot(struct keembay_pinctrl *kpc, unsigned int src)  in keembay_find_free_slot()  argument
1313 	unsigned long val = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_find_free_slot()
1318 static int keembay_find_free_src(struct keembay_pinctrl *kpc, unsigned int trig)  in keembay_find_free_src()  argument
1328 		if (kpc->irq[src].trigger != type)  in keembay_find_free_src()
1331 		if (!keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src) ||  in keembay_find_free_src()
1332 		    kpc->irq[src].num_share < KEEMBAY_GPIO_MAX_PER_IRQ)  in keembay_find_free_src()
1339 static void keembay_gpio_set_irq(struct keembay_pinctrl *kpc, int src,  in keembay_gpio_set_irq()  argument
1343 	struct keembay_gpio_irq *irq = &kpc->irq[src];  in keembay_gpio_set_irq()
1346 	raw_spin_lock_irqsave(&kpc->lock, flags);  in keembay_gpio_set_irq()
1347 	reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_set_irq()
1349 	keembay_write_reg(reg, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_set_irq()
1350 	raw_spin_unlock_irqrestore(&kpc->lock, flags);  in keembay_gpio_set_irq()
1353 		kpc->max_gpios_level_type--;  in keembay_gpio_set_irq()
1355 		kpc->max_gpios_edge_type--;  in keembay_gpio_set_irq()
1365 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_irq_enable()  local
1371 	src = keembay_find_free_src(kpc, trig);  in keembay_gpio_irq_enable()
1372 	slot = keembay_find_free_slot(kpc, src);  in keembay_gpio_irq_enable()
1378 		keembay_gpio_invert(kpc, pin);  in keembay_gpio_irq_enable()
1380 	keembay_gpio_set_irq(kpc, src, slot, pin);  in keembay_gpio_irq_enable()
1399 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_irq_disable()  local
1405 		reg = keembay_read_reg(kpc->base1 + KEEMBAY_GPIO_INT_CFG, src);  in keembay_gpio_irq_disable()
1418 	struct keembay_pinctrl *kpc = gpiochip_get_data(gc);  in keembay_gpio_irq_set_type()  local
1421 	if (!kpc->max_gpios_edge_type && (type & IRQ_TYPE_EDGE_BOTH))  in keembay_gpio_irq_set_type()
1424 	if (!kpc->max_gpios_level_type && (type & IRQ_TYPE_LEVEL_MASK))  in keembay_gpio_irq_set_type()
1439 	struct keembay_pinctrl *kpc = gpiochip_get_data(chip);  in keembay_gpio_add_pin_ranges()  local
1442 	ret = gpiochip_add_pin_range(chip, dev_name(kpc->dev), 0, 0, chip->ngpio);  in keembay_gpio_add_pin_ranges()
1444 		dev_err_probe(kpc->dev, ret, "failed to add GPIO pin range\n");  in keembay_gpio_add_pin_ranges()
1456 static int keembay_gpiochip_probe(struct keembay_pinctrl *kpc,  in keembay_gpiochip_probe()  argument
1460 	struct gpio_chip *gc = &kpc->chip;  in keembay_gpiochip_probe()
1464 	girq			= &kpc->chip.irq;  in keembay_gpiochip_probe()
1468 	girq->parents		= devm_kcalloc(kpc->dev, girq->num_parents,  in keembay_gpiochip_probe()
1475 	gc->label		= dev_name(kpc->dev);  in keembay_gpiochip_probe()
1476 	gc->parent		= kpc->dev;  in keembay_gpiochip_probe()
1486 	gc->ngpio		= kpc->npins;  in keembay_gpiochip_probe()
1490 		struct keembay_gpio_irq *kmb_irq = &kpc->irq[i];  in keembay_gpiochip_probe()
1509 	kpc->max_gpios_level_type = level_line * KEEMBAY_GPIO_MAX_PER_IRQ;  in keembay_gpiochip_probe()
1510 	kpc->max_gpios_edge_type = edge_line * KEEMBAY_GPIO_MAX_PER_IRQ;  in keembay_gpiochip_probe()
1515 	return devm_gpiochip_add_data(kpc->dev, gc, kpc);  in keembay_gpiochip_probe()
1518 static int keembay_build_groups(struct keembay_pinctrl *kpc)  in keembay_build_groups()  argument
1523 	kpc->ngroups = kpc->npins;  in keembay_build_groups()
1524 	grp = devm_kcalloc(kpc->dev, kpc->ngroups, sizeof(*grp), GFP_KERNEL);  in keembay_build_groups()
1529 	for (i = 0; i < kpc->ngroups; i++) {  in keembay_build_groups()
1535 		pinctrl_generic_add_group(kpc->pctrl, kmb_grp->name,  in keembay_build_groups()
1542 static int keembay_pinctrl_reg(struct keembay_pinctrl *kpc,  struct device *dev)  in keembay_pinctrl_reg()  argument
1547 	ret = of_property_read_u32(dev->of_node, "ngpios", &kpc->npins);  in keembay_pinctrl_reg()
1550 	keembay_pinctrl_desc.npins = kpc->npins;  in keembay_pinctrl_reg()
1552 	kpc->pctrl = devm_pinctrl_register(kpc->dev, &keembay_pinctrl_desc, kpc);  in keembay_pinctrl_reg()
1554 	return PTR_ERR_OR_ZERO(kpc->pctrl);  in keembay_pinctrl_reg()
1557 static int keembay_add_functions(struct keembay_pinctrl *kpc,  in keembay_add_functions()  argument
1563 	for (i = 0; i < kpc->nfuncs; i++) {  in keembay_add_functions()
1569 		group_names = devm_kcalloc(kpc->dev, func->num_group_names,  in keembay_add_functions()
1574 		for (j = 0; j < kpc->npins; j++) {  in keembay_add_functions()
1588 	for (i = 0; i < kpc->nfuncs; i++) {  in keembay_add_functions()
1589 		pinmux_generic_add_function(kpc->pctrl,  in keembay_add_functions()
1599 static int keembay_build_functions(struct keembay_pinctrl *kpc)  in keembay_build_functions()  argument
1608 	kpc->nfuncs = 0;  in keembay_build_functions()
1609 	keembay_funcs = kcalloc(kpc->npins * 8, sizeof(*keembay_funcs), GFP_KERNEL);  in keembay_build_functions()
1614 	for (i = 0; i < kpc->npins; i++) {  in keembay_build_functions()
1634 				kpc->nfuncs++;  in keembay_build_functions()
1640 	new_funcs = krealloc(keembay_funcs, kpc->nfuncs * sizeof(*new_funcs), GFP_KERNEL);  in keembay_build_functions()
1646 	return keembay_add_functions(kpc, new_funcs);  in keembay_build_functions()
1662 	struct keembay_pinctrl *kpc;  in keembay_pinctrl_probe()  local
1665 	kpc = devm_kzalloc(dev, sizeof(*kpc), GFP_KERNEL);  in keembay_pinctrl_probe()
1666 	if (!kpc)  in keembay_pinctrl_probe()
1669 	kpc->dev = dev;  in keembay_pinctrl_probe()
1670 	kpc->soc = device_get_match_data(dev);  in keembay_pinctrl_probe()
1672 	kpc->base0 = devm_platform_ioremap_resource(pdev, 0);  in keembay_pinctrl_probe()
1673 	if (IS_ERR(kpc->base0))  in keembay_pinctrl_probe()
1674 		return PTR_ERR(kpc->base0);  in keembay_pinctrl_probe()
1676 	kpc->base1 = devm_platform_ioremap_resource(pdev, 1);  in keembay_pinctrl_probe()
1677 	if (IS_ERR(kpc->base1))  in keembay_pinctrl_probe()
1678 		return PTR_ERR(kpc->base1);  in keembay_pinctrl_probe()
1680 	raw_spin_lock_init(&kpc->lock);  in keembay_pinctrl_probe()
1682 	ret = keembay_pinctrl_reg(kpc, dev);  in keembay_pinctrl_probe()
1686 	ret = keembay_build_groups(kpc);  in keembay_pinctrl_probe()
1690 	ret = keembay_build_functions(kpc);  in keembay_pinctrl_probe()
1694 	ret = keembay_gpiochip_probe(kpc, pdev);  in keembay_pinctrl_probe()
1698 	platform_set_drvdata(pdev, kpc);  in keembay_pinctrl_probe()