Lines Matching refs:NSP_MUX_BASE0
33 #define NSP_MUX_BASE0 0x00 macro
236 NSP_PIN_GROUP(spi, NSP_MUX_BASE0, 0, 0x0f, 0x00),
237 NSP_PIN_GROUP(i2c, NSP_MUX_BASE0, 3, 0x03, 0x00),
238 NSP_PIN_GROUP(mdio, NSP_MUX_BASE0, 5, 0x03, 0x00),
239 NSP_PIN_GROUP(gpio_b_0, NSP_MUX_BASE0, 7, 0x01, 0x00),
241 NSP_PIN_GROUP(gpio_b_1, NSP_MUX_BASE0, 8, 0x01, 0x00),
243 NSP_PIN_GROUP(gpio_b_2, NSP_MUX_BASE0, 9, 0x01, 0x00),
245 NSP_PIN_GROUP(gpio_b_3, NSP_MUX_BASE0, 10, 0x01, 0x00),
247 NSP_PIN_GROUP(uart1, NSP_MUX_BASE0, 11, 0x0f, 0x00),
248 NSP_PIN_GROUP(uart2, NSP_MUX_BASE0, 15, 0x03, 0x00),
249 NSP_PIN_GROUP(synce, NSP_MUX_BASE0, 17, 0x01, 0x01),
250 NSP_PIN_GROUP(sata0_led, NSP_MUX_BASE0, 18, 0x01, 0x01),
251 NSP_PIN_GROUP(sata1_led, NSP_MUX_BASE0, 19, 0x01, 0x01),
252 NSP_PIN_GROUP(xtal_out, NSP_MUX_BASE0, 20, 0x01, 0x00),
253 NSP_PIN_GROUP(sdio_pwr, NSP_MUX_BASE0, 21, 0x01, 0x00),
254 NSP_PIN_GROUP(sdio_1p8v, NSP_MUX_BASE0, 22, 0x01, 0x00),
255 NSP_PIN_GROUP(switch_p05_led0, NSP_MUX_BASE0, 26, 0x01, 0x01),
256 NSP_PIN_GROUP(switch_p05_led1, NSP_MUX_BASE0, 27, 0x01, 0x01),
422 case NSP_MUX_BASE0: in nsp_pinmux_set()