112 	void __iomem *pbase = inst->port_base;  in u2_phy_slew_rate_calibrate()  local
122 	mtk_phy_set_bits(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCAL_EN);  in u2_phy_slew_rate_calibrate()
126 	mtk_phy_set_bits(pbase + XSP_U2FREQ_FMMONR1, P2F_RG_FRCK_EN);  in u2_phy_slew_rate_calibrate()
129 	mtk_phy_update_field(pbase + XSP_U2FREQ_FMCR0, P2F_RG_CYCLECNT,  in u2_phy_slew_rate_calibrate()
133 	mtk_phy_set_bits(pbase + XSP_U2FREQ_FMCR0, P2F_RG_FREQDET_EN);  in u2_phy_slew_rate_calibrate()
136 	readl_poll_timeout(pbase + XSP_U2FREQ_FMMONR1, tmp,  in u2_phy_slew_rate_calibrate()
139 	fm_out = readl(pbase + XSP_U2FREQ_MMONR0);  in u2_phy_slew_rate_calibrate()
142 	mtk_phy_clear_bits(pbase + XSP_U2FREQ_FMCR0, P2F_RG_FREQDET_EN);  in u2_phy_slew_rate_calibrate()
145 	mtk_phy_clear_bits(pbase + XSP_U2FREQ_FMMONR1, P2F_RG_FRCK_EN);  in u2_phy_slew_rate_calibrate()
161 	mtk_phy_update_field(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCTRL, calib_val);  in u2_phy_slew_rate_calibrate()
164 	mtk_phy_clear_bits(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCAL_EN);  in u2_phy_slew_rate_calibrate()
170 	void __iomem *pbase = inst->port_base;  in u2_phy_instance_init()  local
173 	mtk_phy_clear_bits(pbase + XSP_USBPHYACR6, P2A6_RG_BC11_SW_EN);  in u2_phy_instance_init()
175 	mtk_phy_set_bits(pbase + XSP_USBPHYACR0, P2A0_RG_INTR_EN);  in u2_phy_instance_init()
181 	void __iomem *pbase = inst->port_base;  in u2_phy_instance_power_on()  local
184 	mtk_phy_set_bits(pbase + XSP_USBPHYACR6, P2A6_RG_OTG_VBUSCMP_EN);  in u2_phy_instance_power_on()
186 	mtk_phy_update_bits(pbase + XSP_U2PHYDTM1,  in u2_phy_instance_power_on()
196 	void __iomem *pbase = inst->port_base;  in u2_phy_instance_power_off()  local
199 	mtk_phy_clear_bits(pbase + XSP_USBPHYACR6, P2A6_RG_OTG_VBUSCMP_EN);  in u2_phy_instance_power_off()
201 	mtk_phy_update_bits(pbase + XSP_U2PHYDTM1,  in u2_phy_instance_power_off()
271 	void __iomem *pbase = inst->port_base;  in u2_phy_props_set()  local
274 		mtk_phy_update_field(pbase + XSP_USBPHYACR1, P2A1_RG_INTR_CAL,  in u2_phy_props_set()
278 		mtk_phy_update_field(pbase + XSP_USBPHYACR5, P2A5_RG_HSTX_SRCTRL,  in u2_phy_props_set()
282 		mtk_phy_update_field(pbase + XSP_USBPHYACR1, P2A1_RG_VRT_SEL,  in u2_phy_props_set()
286 		mtk_phy_update_field(pbase + XSP_USBPHYACR1, P2A1_RG_TERM_SEL,  in u2_phy_props_set()
293 	void __iomem *pbase = inst->port_base;  in u3_phy_props_set()  local
300 		mtk_phy_update_field(pbase + SSPXTP_PHYA_LN_04,  in u3_phy_props_set()
304 		mtk_phy_update_field(pbase + SSPXTP_PHYA_LN_14,  in u3_phy_props_set()