Lines Matching refs:CCN_IDX_PMU_CYCLE_COUNTER
122 #define CCN_IDX_PMU_CYCLE_COUNTER CCN_NUM_PMU_EVENT_COUNTERS macro
645 if (test_and_set_bit(CCN_IDX_PMU_CYCLE_COUNTER, in arm_ccn_pmu_event_alloc()
649 hw->idx = CCN_IDX_PMU_CYCLE_COUNTER; in arm_ccn_pmu_event_alloc()
650 ccn->dt.pmu_counters[CCN_IDX_PMU_CYCLE_COUNTER].event = event; in arm_ccn_pmu_event_alloc()
694 if (hw->idx == CCN_IDX_PMU_CYCLE_COUNTER) { in arm_ccn_pmu_event_release()
695 clear_bit(CCN_IDX_PMU_CYCLE_COUNTER, ccn->dt.pmu_counters_mask); in arm_ccn_pmu_event_release()
848 if (idx == CCN_IDX_PMU_CYCLE_COUNTER) { in arm_ccn_pmu_read_counter()
879 mask = (1LLU << (hw->idx == CCN_IDX_PMU_CYCLE_COUNTER ? 40 : 32)) - 1; in arm_ccn_pmu_event_update()
892 if (hw->idx == CCN_IDX_PMU_CYCLE_COUNTER) in arm_ccn_pmu_xp_dt_config()
1056 if (hw->idx == CCN_IDX_PMU_CYCLE_COUNTER) in arm_ccn_pmu_event_config()
1167 BUILD_BUG_ON(CCN_IDX_PMU_CYCLE_COUNTER != CCN_NUM_PMU_EVENT_COUNTERS); in arm_ccn_pmu_overflow_handler()
1174 idx != CCN_IDX_PMU_CYCLE_COUNTER); in arm_ccn_pmu_overflow_handler()