78 	struct regmap		*iomuxc_gpr;  member
175 	regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);  in imx6_pcie_configure_type()
318 		regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
329 			regmap_update_bits(imx6_pcie->iomuxc_gpr,  in imx6_pcie_init_phy()
335 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
339 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
344 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
348 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_init_phy()
351 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
354 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
357 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
360 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
363 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8,  in imx6_pcie_init_phy()
377 	if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,  in imx7d_pcie_wait_for_phy_pll_lock()
543 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_enable_ref_clk()
549 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
558 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_enable_ref_clk()
577 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
580 		regmap_update_bits(imx6_pcie->iomuxc_gpr, offset,  in imx6_pcie_enable_ref_clk()
597 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
599 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_disable_ref_clk()
604 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_disable_ref_clk()
682 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_assert_core_reset()
686 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_assert_core_reset()
691 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
696 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
698 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_assert_core_reset()
743 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5,  in imx6_pcie_deassert_core_reset()
747 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,  in imx6_pcie_deassert_core_reset()
797 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_enable()
818 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_ltssm_disable()
1023 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1026 		regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,  in imx6_pcie_pm_turnoff()
1230 	imx6_pcie->iomuxc_gpr =  in imx6_pcie_probe()
1232 	if (IS_ERR(imx6_pcie->iomuxc_gpr)) {  in imx6_pcie_probe()
1234 		return PTR_ERR(imx6_pcie->iomuxc_gpr);  in imx6_pcie_probe()