Lines Matching refs:physport

134 	const struct parport_pc_private *priv = p->physport->private_data;  in change_mode()
154 unsigned long expire = jiffies + p->physport->cad->timeout; in change_mode()
241 const struct parport_pc_private *priv = p->physport->private_data; in parport_pc_save_state()
250 struct parport_pc_private *priv = p->physport->private_data; in parport_pc_restore_state()
470 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_pio()
473 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_pio()
476 port = port->physport; in parport_pc_fifo_write_block_pio()
568 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_fifo_write_block_dma()
569 struct device *dev = port->physport->dev; in parport_pc_fifo_write_block_dma()
591 port = port->physport; in parport_pc_fifo_write_block_dma()
602 unsigned long expire = jiffies + port->physport->cad->timeout; in parport_pc_fifo_write_block_dma()
709 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_compat_write_block_pio()
713 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_compat_write_block_pio()
725 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_compat_write_block_pio()
769 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_compat_write_block_pio()
783 const struct parport_pc_private *priv = port->physport->private_data; in parport_pc_ecp_write_block_pio()
787 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) in parport_pc_ecp_write_block_pio()
792 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { in parport_pc_ecp_write_block_pio()
820 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_pc_ecp_write_block_pio()
883 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_pc_ecp_write_block_pio()
2266 dma_free_coherent(p->physport->dev, PAGE_SIZE, in parport_pc_unregister_port()