125 	void __iomem *mmio, *peer_mmio;  in amd_ntb_mw_set_trans()  local
142 	mmio = ndev->self_mmio;  in amd_ntb_mw_set_trans()
166 			write64(base_addr, mmio + limit_reg);  in amd_ntb_mw_set_trans()
189 			writel(base_addr, mmio + limit_reg);  in amd_ntb_mw_set_trans()
346 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_link_enable()  local
350 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);  in amd_ntb_link_enable()
362 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_link_disable()  local
366 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);  in amd_ntb_link_disable()
423 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_db_read()  local
425 	return (u64)readw(mmio + AMD_DBSTAT_OFFSET);  in amd_ntb_db_read()
431 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_db_clear()  local
433 	writew((u16)db_bits, mmio + AMD_DBSTAT_OFFSET);  in amd_ntb_db_clear()
441 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_db_set_mask()  local
449 	writew((u16)ndev->db_mask, mmio + AMD_DBMASK_OFFSET);  in amd_ntb_db_set_mask()
458 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_db_clear_mask()  local
466 	writew((u16)ndev->db_mask, mmio + AMD_DBMASK_OFFSET);  in amd_ntb_db_clear_mask()
475 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_peer_db_set()  local
477 	writew((u16)db_bits, mmio + AMD_DBREQ_OFFSET);  in amd_ntb_peer_db_set()
490 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_spad_read()  local
497 	return readl(mmio + AMD_SPAD_OFFSET + offset);  in amd_ntb_spad_read()
504 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_spad_write()  local
511 	writel(val, mmio + AMD_SPAD_OFFSET + offset);  in amd_ntb_spad_write()
519 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_peer_spad_read()  local
526 	return readl(mmio + AMD_SPAD_OFFSET + offset);  in amd_ntb_peer_spad_read()
533 	void __iomem *mmio = ndev->self_mmio;  in amd_ntb_peer_spad_write()  local
540 	writel(val, mmio + AMD_SPAD_OFFSET + offset);  in amd_ntb_peer_spad_write()
571 	void __iomem *mmio = ndev->self_mmio;  in amd_ack_smu()  local
574 	reg = readl(mmio + AMD_SMUACK_OFFSET);  in amd_ack_smu()
576 	writel(reg, mmio + AMD_SMUACK_OFFSET);  in amd_ack_smu()
581 	void __iomem *mmio = ndev->self_mmio;  in amd_handle_event()  local
585 	status = readl(mmio + AMD_INTSTAT_OFFSET);  in amd_handle_event()
627 		mmio = ndev->peer_mmio;  in amd_handle_event()
628 		status = readl(mmio + AMD_PMESTAT_OFFSET);  in amd_handle_event()
647 	writel(status, mmio + AMD_INTSTAT_OFFSET);  in amd_handle_event()
813 	void __iomem *mmio = ndev->self_mmio;  in ndev_deinit_isr()  local
820 	writel(ndev->db_mask, mmio + AMD_DBMASK_OFFSET);  in ndev_deinit_isr()
842 	void __iomem *mmio;  in ndev_debugfs_read()  local
849 	mmio = ndev->self_mmio;  in ndev_debugfs_read()
899 	u.v32 = readl(mmio + AMD_DBSTAT_OFFSET);  in ndev_debugfs_read()
906 	u.v64 = read64(mmio + AMD_BAR1XLAT_OFFSET);  in ndev_debugfs_read()
918 	u.v32 = readl(mmio + AMD_BAR1LMT_OFFSET);  in ndev_debugfs_read()
971 	void __iomem *mmio = ndev->peer_mmio;  in amd_poll_link()  local
974 	reg = readl(mmio + AMD_SIDEINFO_OFFSET);  in amd_poll_link()
1004 	void __iomem *mmio = NULL;  in amd_set_side_info_reg()  local
1008 		mmio = ndev->peer_mmio;  in amd_set_side_info_reg()
1010 		mmio = ndev->self_mmio;  in amd_set_side_info_reg()
1012 	reg = readl(mmio + AMD_SIDEINFO_OFFSET);  in amd_set_side_info_reg()
1015 		writel(reg, mmio + AMD_SIDEINFO_OFFSET);  in amd_set_side_info_reg()
1021 	void __iomem *mmio = NULL;  in amd_clear_side_info_reg()  local
1025 		mmio = ndev->peer_mmio;  in amd_clear_side_info_reg()
1027 		mmio = ndev->self_mmio;  in amd_clear_side_info_reg()
1029 	reg = readl(mmio + AMD_SIDEINFO_OFFSET);  in amd_clear_side_info_reg()
1032 		writel(reg, mmio + AMD_SIDEINFO_OFFSET);  in amd_clear_side_info_reg()
1033 		readl(mmio + AMD_SIDEINFO_OFFSET);  in amd_clear_side_info_reg()
1039 	void __iomem *mmio = ndev->self_mmio;  in amd_init_side_info()  local
1044 	ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);  in amd_init_side_info()
1046 	writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);  in amd_init_side_info()
1051 	void __iomem *mmio = ndev->self_mmio;  in amd_deinit_side_info()  local
1056 	ntb_ctl = readl(mmio + AMD_CNTL_OFFSET);  in amd_deinit_side_info()
1058 	writel(ntb_ctl, mmio + AMD_CNTL_OFFSET);  in amd_deinit_side_info()
1063 	void __iomem *mmio = ndev->self_mmio;  in amd_init_ntb()  local
1092 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);  in amd_init_ntb()
1099 	void __iomem *mmio = ndev->self_mmio;  in amd_get_topo()  local
1102 	info = readl(mmio + AMD_SIDEINFO_OFFSET);  in amd_get_topo()
1111 	void __iomem *mmio = ndev->self_mmio;  in amd_init_dev()  local
1140 	writew((u16)~BIT(ndev->db_last_bit), mmio + AMD_DBMASK_OFFSET);  in amd_init_dev()
1150 	writel(ndev->int_mask, mmio + AMD_INTMASK_OFFSET);  in amd_init_dev()