82 static void t7xx_dpmaif_mask_ulq_intr(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_mask_ulq_intr()  argument
89 	ul_int_que_done = BIT(q_num + DP_UL_INT_DONE_OFFSET) & DP_UL_INT_QDONE_MSK;  in t7xx_dpmaif_mask_ulq_intr()
102 void t7xx_dpmaif_unmask_ulq_intr(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_unmask_ulq_intr()  argument
109 	ul_int_que_done = BIT(q_num + DP_UL_INT_DONE_OFFSET) & DP_UL_INT_QDONE_MSK;  in t7xx_dpmaif_unmask_ulq_intr()
766 static void t7xx_dpmaif_config_dlq_pit_hw(struct dpmaif_hw_info *hw_info, unsigned int q_num,  in t7xx_dpmaif_config_dlq_pit_hw()  argument
772 	t7xx_dpmaif_dl_dlq_pit_init_done(hw_info, q_num);  in t7xx_dpmaif_config_dlq_pit_hw()
861 					   unsigned int q_num, unsigned int size)  in t7xx_dpmaif_ul_update_drb_size()  argument
865 	value = ioread32(hw_info->pcie_base + DPMAIF_UL_DRBSIZE_ADDRH_n(q_num));  in t7xx_dpmaif_ul_update_drb_size()
868 	iowrite32(value, hw_info->pcie_base + DPMAIF_UL_DRBSIZE_ADDRH_n(q_num));  in t7xx_dpmaif_ul_update_drb_size()
872 						unsigned int q_num, dma_addr_t addr)  in t7xx_dpmaif_ul_update_drb_base_addr()  argument
874 	iowrite32(lower_32_bits(addr), hw_info->pcie_base + DPMAIF_ULQSAR_n(q_num));  in t7xx_dpmaif_ul_update_drb_base_addr()
875 	iowrite32(upper_32_bits(addr), hw_info->pcie_base + DPMAIF_UL_DRB_ADDRH_n(q_num));  in t7xx_dpmaif_ul_update_drb_base_addr()
879 				  unsigned int q_num, bool ready)  in t7xx_dpmaif_ul_rdy_en()  argument
886 		value |= BIT(q_num);  in t7xx_dpmaif_ul_rdy_en()
888 		value &= ~BIT(q_num);  in t7xx_dpmaif_ul_rdy_en()
894 				  unsigned int q_num, bool enable)  in t7xx_dpmaif_ul_arb_en()  argument
901 		value |= BIT(q_num + 8);  in t7xx_dpmaif_ul_arb_en()
903 		value &= ~BIT(q_num + 8);  in t7xx_dpmaif_ul_arb_en()
973 void t7xx_dpmaif_ul_update_hw_drb_cnt(struct dpmaif_hw_info *hw_info, unsigned int q_num,  in t7xx_dpmaif_ul_update_hw_drb_cnt()  argument
982 	err = ioread32_poll_timeout_atomic(hw_info->pcie_base + DPMAIF_ULQ_ADD_DESC_CH_n(q_num),  in t7xx_dpmaif_ul_update_hw_drb_cnt()
990 	iowrite32(ul_update, hw_info->pcie_base + DPMAIF_ULQ_ADD_DESC_CH_n(q_num));  in t7xx_dpmaif_ul_update_hw_drb_cnt()
992 	err = ioread32_poll_timeout_atomic(hw_info->pcie_base + DPMAIF_ULQ_ADD_DESC_CH_n(q_num),  in t7xx_dpmaif_ul_update_hw_drb_cnt()
999 unsigned int t7xx_dpmaif_ul_get_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_ul_get_rd_idx()  argument
1001 	unsigned int value = ioread32(hw_info->pcie_base + DPMAIF_ULQ_STA0_n(q_num));  in t7xx_dpmaif_ul_get_rd_idx()
1076 unsigned int t7xx_dpmaif_dl_get_bat_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_dl_get_bat_rd_idx()  argument
1084 unsigned int t7xx_dpmaif_dl_get_bat_wr_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_dl_get_bat_wr_idx()  argument
1113 unsigned int t7xx_dpmaif_dl_get_frg_rd_idx(struct dpmaif_hw_info *hw_info, unsigned int q_num)  in t7xx_dpmaif_dl_get_frg_rd_idx()  argument