Lines Matching refs:ap_ao_base
79 iowrite32(TXRX_STATUS_BITMASK, hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0); in t7xx_cldma_hw_start()
82 iowrite32(EMPTY_STATUS_BITMASK, hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0); in t7xx_cldma_hw_start()
118 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_DL_START_ADDRL_0 : in t7xx_cldma_hw_set_start_addr()
141 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_DL_STATUS : in t7xx_cldma_hw_queue_status()
188 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_L2RIMSR0 : in t7xx_cldma_hw_irq_dis_txrx()
199 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_L2RIMSR0 : in t7xx_cldma_hw_irq_dis_eq()
211 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0 : in t7xx_cldma_hw_irq_en_txrx()
222 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_L2RIMCR0 : in t7xx_cldma_hw_irq_en_eq()
239 dl_cfg = ioread32(hw_info->ap_ao_base + REG_CLDMA_DL_CFG); in t7xx_cldma_hw_init()
257 iowrite32(dl_cfg, hw_info->ap_ao_base + REG_CLDMA_DL_CFG); in t7xx_cldma_hw_init()
258 iowrite32(0, hw_info->ap_ao_base + REG_CLDMA_INT_MASK); in t7xx_cldma_hw_init()
259 iowrite32(BUSY_MASK_MD, hw_info->ap_ao_base + REG_CLDMA_BUSY_MASK); in t7xx_cldma_hw_init()
277 reg = tx_rx == MTK_RX ? hw_info->ap_ao_base + REG_CLDMA_L2RIMSR0 : in t7xx_cldma_hw_stop()