Lines Matching refs:zd_iowrite32_locked
290 r = zd_iowrite32_locked(chip, value, addr); in zd_iowrite32()
519 r = zd_iowrite32_locked(chip, tmp, CR_REG1); in zd_chip_lock_phy_regs()
540 r = zd_iowrite32_locked(chip, tmp, CR_REG1); in zd_chip_unlock_phy_regs()
560 return zd_iowrite32_locked(chip, value >> 8, ZD_CR157); in patch_cr157()
910 r = zd_iowrite32_locked(chip, b_interval, CR_BCN_INTERVAL); in set_beacon_interval()
1044 return zd_iowrite32_locked(chip, rates, CR_MANDATORY_RATE_TBL); in set_mandatory_rates()
1062 return zd_iowrite32_locked(chip, value, CR_RTS_CTS_RATE); in zd_chip_set_rts_cts_rate_locked()
1070 r = zd_iowrite32_locked(chip, HWINT_ENABLED, CR_INTERRUPT); in zd_chip_enable_hwint()
1077 return zd_iowrite32_locked(chip, HWINT_DISABLED, CR_INTERRUPT); in disable_hwint()
1127 r = zd_iowrite32_locked(chip, 1, CR_AFTER_PNP); in zd_chip_init_hw()
1137 r = zd_iowrite32_locked(chip, 0, CR_GPI_EN); in zd_chip_init_hw()
1140 r = zd_iowrite32_locked(chip, CWIN_SIZE, CR_CWMIN_CWMAX); in zd_chip_init_hw()
1281 r = zd_iowrite32_locked(chip, 0, CR_CONFIG_PHILIPS); in zd_chip_set_channel()
1366 r = zd_iowrite32_locked(chip, cr_rates, CR_BASIC_RATE_TBL); in zd_chip_set_basic_rates()