Lines Matching refs:rtw_write32_mask

70 	rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3);  in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
72 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
75 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
76 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
79 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
80 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
152 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
153 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
460 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
461 rtw_write32_mask(rtwdev, REG_PDMFTH, MASKDWORD, reg830); in rtw8822b_set_channel_cca()
462 rtw_write32_mask(rtwdev, REG_CCA2ND, MASKDWORD, reg838); in rtw8822b_set_channel_cca()
465 rtw_write32_mask(rtwdev, REG_L1WT, MASKDWORD, 0x9194b2b9); in rtw8822b_set_channel_cca()
468 rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf0, 0x4); in rtw8822b_set_channel_cca()
562 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi - 2); in rtw8822b_toggle_igi()
563 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi); in rtw8822b_toggle_igi()
564 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi - 2); in rtw8822b_toggle_igi()
565 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi); in rtw8822b_toggle_igi()
567 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, 0x0); in rtw8822b_toggle_igi()
568 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
576 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
577 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x0); in rtw8822b_set_channel_rxdfir()
581 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
582 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8822b_set_channel_rxdfir()
586 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
587 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8822b_set_channel_rxdfir()
600 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x1); in rtw8822b_set_channel_bb()
601 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x0); in rtw8822b_set_channel_bb()
602 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x0); in rtw8822b_set_channel_bb()
603 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 15); in rtw8822b_set_channel_bb()
605 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x0); in rtw8822b_set_channel_bb()
606 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x96a); in rtw8822b_set_channel_bb()
608 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x00006577); in rtw8822b_set_channel_bb()
609 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000); in rtw8822b_set_channel_bb()
611 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, 0x384f6577); in rtw8822b_set_channel_bb()
612 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525); in rtw8822b_set_channel_bb()
615 rtw_write32_mask(rtwdev, REG_RFEINV, 0x300, 0x2); in rtw8822b_set_channel_bb()
617 rtw_write32_mask(rtwdev, REG_ENTXCCK, BIT(18), 0x1); in rtw8822b_set_channel_bb()
618 rtw_write32_mask(rtwdev, REG_CCK_CHECK, BIT(7), 0x1); in rtw8822b_set_channel_bb()
619 rtw_write32_mask(rtwdev, REG_RXPSEL, BIT(28), 0x0); in rtw8822b_set_channel_bb()
620 rtw_write32_mask(rtwdev, REG_RXCCAMSK, 0x0000FC00, 34); in rtw8822b_set_channel_bb()
623 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x1); in rtw8822b_set_channel_bb()
625 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x2); in rtw8822b_set_channel_bb()
627 rtw_write32_mask(rtwdev, REG_ACGG2TBL, 0x1f, 0x3); in rtw8822b_set_channel_bb()
630 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x494); in rtw8822b_set_channel_bb()
632 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x453); in rtw8822b_set_channel_bb()
634 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x452); in rtw8822b_set_channel_bb()
636 rtw_write32_mask(rtwdev, REG_CLKTRK, 0x1ffe0000, 0x412); in rtw8822b_set_channel_bb()
638 rtw_write32_mask(rtwdev, 0xcbc, 0x300, 0x1); in rtw8822b_set_channel_bb()
647 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
649 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
660 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
662 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
668 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
670 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x1); in rtw8822b_set_channel_bb()
673 rtw_write32_mask(rtwdev, REG_L1PKWT, 0x0000f000, 0x6); in rtw8822b_set_channel_bb()
674 rtw_write32_mask(rtwdev, REG_ADC40, BIT(10), 0x1); in rtw8822b_set_channel_bb()
681 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
683 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
684 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
690 rtw_write32_mask(rtwdev, REG_ADCCLK, MASKDWORD, val32); in rtw8822b_set_channel_bb()
692 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0x0); in rtw8822b_set_channel_bb()
693 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8822b_set_channel_bb()
735 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
737 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
740 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231); in rtw8822b_config_trx_mode()
742 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111); in rtw8822b_config_trx_mode()
744 rtw_write32_mask(rtwdev, REG_CDDTXP, (BIT(19) | BIT(18)), 0x3); in rtw8822b_config_trx_mode()
745 rtw_write32_mask(rtwdev, REG_TXPSEL, (BIT(29) | BIT(28)), 0x1); in rtw8822b_config_trx_mode()
746 rtw_write32_mask(rtwdev, REG_TXPSEL, BIT(30), 0x1); in rtw8822b_config_trx_mode()
749 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x001); in rtw8822b_config_trx_mode()
750 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x8); in rtw8822b_config_trx_mode()
752 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x002); in rtw8822b_config_trx_mode()
753 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0x4); in rtw8822b_config_trx_mode()
757 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x01); in rtw8822b_config_trx_mode()
759 rtw_write32_mask(rtwdev, REG_TXPSEL1, 0xfff0, 0x43); in rtw8822b_config_trx_mode()
762 rtw_write32_mask(rtwdev, REG_TXPSEL, MASKBYTE0, tx_path_sel); in rtw8822b_config_trx_mode()
766 rtw_write32_mask(rtwdev, REG_CDDTXP, 0xfff00000, 0x043); in rtw8822b_config_trx_mode()
767 rtw_write32_mask(rtwdev, REG_ADCINI, 0xf0000000, 0xc); in rtw8822b_config_trx_mode()
771 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(22), 0x0); in rtw8822b_config_trx_mode()
772 rtw_write32_mask(rtwdev, REG_RXDESC, BIT(18), 0x0); in rtw8822b_config_trx_mode()
775 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x0); in rtw8822b_config_trx_mode()
777 rtw_write32_mask(rtwdev, REG_ADCINI, 0x0f000000, 0x5); in rtw8822b_config_trx_mode()
780 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, rx_path_sel); in rtw8822b_config_trx_mode()
783 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x0); in rtw8822b_config_trx_mode()
784 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x0); in rtw8822b_config_trx_mode()
785 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x0); in rtw8822b_config_trx_mode()
787 rtw_write32_mask(rtwdev, REG_ANTWT, BIT(16), 0x1); in rtw8822b_config_trx_mode()
788 rtw_write32_mask(rtwdev, REG_HTSTFWT, BIT(28), 0x1); in rtw8822b_config_trx_mode()
789 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x1); in rtw8822b_config_trx_mode()
1431 rtw_write32_mask(rtwdev, reg1, GENMASK(29, 25), txagc_idx); in rtw8822b_pwrtrack_set_pwr()
1432 rtw_write32_mask(rtwdev, reg2, GENMASK(31, 21), in rtw8822b_pwrtrack_set_pwr()
1565 rtw_write32_mask(rtwdev, REG_EDCCA_SOURCE, BIT_SOURCE_OPTION, in rtw8822b_adaptivity_init()
1567 rtw_write32_mask(rtwdev, REG_EDCCA_POW_MA, BIT_MA_LEVEL, 0); in rtw8822b_adaptivity_init()