230 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_dig_write()  local
239 	for (path = 0; path < hal->rf_path_num; path++) {  in rtw_phy_dig_write()
633 	for (i = 0; i < rtwdev->hal.rf_path_num; i++) {  in rtw_phy_parsing_cfo_iter()
728 	if (rtwdev->hal.current_band_type != RTW_BAND_2G)  in rtw_phy_cck_pd()
897 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_read_rf()  local
902 	if (rf_path >= hal->rf_phy_num) {  in rtw_phy_read_rf()
920 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_read_rf_sipi()  local
929 	if (rf_path >= hal->rf_phy_num) {  in rtw_phy_read_rf_sipi()
969 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_write_rf_reg_sipi()  local
976 	if (rf_path >= hal->rf_phy_num) {  in rtw_phy_write_rf_reg_sipi()
1009 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_write_rf_reg()  local
1014 	if (rf_path >= hal->rf_phy_num) {  in rtw_phy_write_rf_reg()
1042 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_setup_phy_cond()  local
1046 	cond.cut = hal->cut_version ? hal->cut_version : 15;  in rtw_phy_setup_phy_cond()
1064 	hal->phy_cond = cond;  in rtw_phy_setup_phy_cond()
1066 	rtw_dbg(rtwdev, RTW_DBG_PHY, "phy cond=0x%08x\n", *((u32 *)&hal->phy_cond));  in rtw_phy_setup_phy_cond()
1071 	struct rtw_hal *hal = &rtwdev->hal;  in check_positive()  local
1072 	struct rtw_phy_cond drv_cond = hal->phy_cond;  in check_positive()
1452 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_store_tx_power_by_rate()  local
1472 			hal->tx_pwr_by_rate_offset_2g[rfpath][rate] = offset;  in rtw_phy_store_tx_power_by_rate()
1474 			hal->tx_pwr_by_rate_offset_5g[rfpath][rate] = offset;  in rtw_phy_store_tx_power_by_rate()
1532 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_set_tx_power_limit()  local
1550 		hal->tx_pwr_limit_2g[regd][bw][rs][ch_idx] = pwr_limit;  in rtw_phy_set_tx_power_limit()
1551 		ww = hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx];  in rtw_phy_set_tx_power_limit()
1553 		hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx] = ww;  in rtw_phy_set_tx_power_limit()
1555 		hal->tx_pwr_limit_5g[regd][bw][rs][ch_idx] = pwr_limit;  in rtw_phy_set_tx_power_limit()
1556 		ww = hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx];  in rtw_phy_set_tx_power_limit()
1558 		hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx] = ww;  in rtw_phy_set_tx_power_limit()
1567 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_xref_5g_txpwr_lmt()  local
1569 	s8 lmt_ht = hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx];  in rtw_xref_5g_txpwr_lmt()
1570 	s8 lmt_vht = hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx];  in rtw_xref_5g_txpwr_lmt()
1576 		hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx] = lmt_vht;  in rtw_xref_5g_txpwr_lmt()
1579 		hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx] = lmt_ht;  in rtw_xref_5g_txpwr_lmt()
1628 __cfg_txpwr_lmt_by_alt(struct rtw_hal *hal, u8 regd, u8 regd_alt, u8 bw, u8 rs)  in __cfg_txpwr_lmt_by_alt()  argument
1633 		hal->tx_pwr_limit_2g[regd][bw][rs][ch] =  in __cfg_txpwr_lmt_by_alt()
1634 			hal->tx_pwr_limit_2g[regd_alt][bw][rs][ch];  in __cfg_txpwr_lmt_by_alt()
1637 		hal->tx_pwr_limit_5g[regd][bw][rs][ch] =  in __cfg_txpwr_lmt_by_alt()
1638 			hal->tx_pwr_limit_5g[regd_alt][bw][rs][ch];  in __cfg_txpwr_lmt_by_alt()
1648 			__cfg_txpwr_lmt_by_alt(&rtwdev->hal, regd, regd_alt,  in rtw_cfg_txpwr_lmt_by_alt()
1772 	for (rf_path = 0; rf_path < rtwdev->hal.rf_path_num; rf_path++) {  in rtw_phy_load_tables()
2026 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_get_tx_power_limit()  local
2027 	u8 *cch_by_bw = hal->cch_by_bw;  in rtw_phy_get_tx_power_limit()
2057 			hal->tx_pwr_limit_2g[regd][cur_bw][rs][ch_idx] :  in rtw_phy_get_tx_power_limit()
2058 			hal->tx_pwr_limit_5g[regd][cur_bw][rs][ch_idx];  in rtw_phy_get_tx_power_limit()
2095 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_get_tx_power_params()  local
2114 		*offset = hal->tx_pwr_by_rate_offset_2g[path][rate];  in rtw_get_tx_power_params()
2120 		*offset = hal->tx_pwr_by_rate_offset_5g[path][rate];  in rtw_get_tx_power_params()
2127 	*sar = rtw_phy_get_tx_power_sar(rtwdev, hal->sar_band, path, rate);  in rtw_get_tx_power_params()
2161 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_set_tx_power_index_by_rs()  local
2175 	bw = hal->current_band_width;  in rtw_phy_set_tx_power_index_by_rs()
2180 		hal->tx_pwr_tbl[path][rate] = pwr_idx;  in rtw_phy_set_tx_power_index_by_rs()
2192 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_set_tx_power_level_by_path()  local
2196 	if (hal->current_band_type == RTW_BAND_2G)  in rtw_phy_set_tx_power_level_by_path()
2208 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_set_tx_power_level()  local
2211 	mutex_lock(&hal->tx_power_mutex);  in rtw_phy_set_tx_power_level()
2213 	for (path = 0; path < hal->rf_path_num; path++)  in rtw_phy_set_tx_power_level()
2217 	mutex_unlock(&hal->tx_power_mutex);  in rtw_phy_set_tx_power_level()
2222 rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,  in rtw_phy_tx_power_by_rate_config_by_path()  argument
2233 	base_2g = hal->tx_pwr_by_rate_offset_2g[path][base_idx];  in rtw_phy_tx_power_by_rate_config_by_path()
2234 	base_5g = hal->tx_pwr_by_rate_offset_5g[path][base_idx];  in rtw_phy_tx_power_by_rate_config_by_path()
2235 	hal->tx_pwr_by_rate_base_2g[path][rs] = base_2g;  in rtw_phy_tx_power_by_rate_config_by_path()
2236 	hal->tx_pwr_by_rate_base_5g[path][rs] = base_5g;  in rtw_phy_tx_power_by_rate_config_by_path()
2239 		hal->tx_pwr_by_rate_offset_2g[path][rate_idx] -= base_2g;  in rtw_phy_tx_power_by_rate_config_by_path()
2240 		hal->tx_pwr_by_rate_offset_5g[path][rate_idx] -= base_5g;  in rtw_phy_tx_power_by_rate_config_by_path()
2244 void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal)  in rtw_phy_tx_power_by_rate_config()  argument
2249 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2252 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2255 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2258 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2261 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2264 		rtw_phy_tx_power_by_rate_config_by_path(hal, path,  in rtw_phy_tx_power_by_rate_config()
2271 __rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)  in __rtw_phy_tx_power_limit_config()  argument
2277 		base = hal->tx_pwr_by_rate_base_2g[0][rs];  in __rtw_phy_tx_power_limit_config()
2278 		hal->tx_pwr_limit_2g[regd][bw][rs][ch] -= base;  in __rtw_phy_tx_power_limit_config()
2282 		base = hal->tx_pwr_by_rate_base_5g[0][rs];  in __rtw_phy_tx_power_limit_config()
2283 		hal->tx_pwr_limit_5g[regd][bw][rs][ch] -= base;  in __rtw_phy_tx_power_limit_config()
2287 void rtw_phy_tx_power_limit_config(struct rtw_hal *hal)  in rtw_phy_tx_power_limit_config()  argument
2292 	hal->cch_by_bw[RTW_CHANNEL_WIDTH_20] = 1;  in rtw_phy_tx_power_limit_config()
2297 				__rtw_phy_tx_power_limit_config(hal, regd, bw, rs);  in rtw_phy_tx_power_limit_config()
2303 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_init_tx_power_limit()  local
2309 		hal->tx_pwr_limit_2g[regd][bw][rs][ch] = max_power_index;  in rtw_phy_init_tx_power_limit()
2313 		hal->tx_pwr_limit_5g[regd][bw][rs][ch] = max_power_index;  in rtw_phy_init_tx_power_limit()
2318 	struct rtw_hal *hal = &rtwdev->hal;  in rtw_phy_init_tx_power()  local
2324 			hal->tx_pwr_by_rate_offset_2g[path][rate] = 0;  in rtw_phy_init_tx_power()
2325 			hal->tx_pwr_by_rate_offset_5g[path][rate] = 0;  in rtw_phy_init_tx_power()
2341 	u8 channel = rtwdev->hal.current_channel;  in rtw_phy_config_swing_table()
2490 	chip->ops->config_tx_path(rtwdev, rtwdev->hal.antenna_tx,  in rtw_phy_set_tx_path_by_reg()
2521 	if (rtwdev->hal.antenna_rx != BB_PATH_AB) {  in rtw_phy_tx_path_diversity_2ss()
2524 			rtwdev->hal.antenna_tx, rtwdev->hal.antenna_rx);  in rtw_phy_tx_path_diversity_2ss()