Lines Matching refs:rtl_set_bbreg
117 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl8723e_phy_bb_config_1t()
118 rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022); in _rtl8723e_phy_bb_config_1t()
119 rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45); in _rtl8723e_phy_bb_config_1t()
120 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23); in _rtl8723e_phy_bb_config_1t()
121 rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1); in _rtl8723e_phy_bb_config_1t()
122 rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
123 rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
124 rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
125 rtl_set_bbreg(hw, 0xe80, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
126 rtl_set_bbreg(hw, 0xe88, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
267 rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, in _rtl8723e_phy_config_bb_with_headerfile()
277 rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, in _rtl8723e_phy_config_bb_with_headerfile()
770 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); in rtl8723e_phy_set_bw_mode_callback()
771 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); in rtl8723e_phy_set_bw_mode_callback()
772 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); in rtl8723e_phy_set_bw_mode_callback()
775 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); in rtl8723e_phy_set_bw_mode_callback()
776 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); in rtl8723e_phy_set_bw_mode_callback()
778 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND, in rtl8723e_phy_set_bw_mode_callback()
780 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl8723e_phy_set_bw_mode_callback()
781 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0); in rtl8723e_phy_set_bw_mode_callback()
783 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), in rtl8723e_phy_set_bw_mode_callback()
1013 rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x10008c1f); in _rtl8723e_phy_path_a_iqk()
1014 rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x10008c1f); in _rtl8723e_phy_path_a_iqk()
1015 rtl_set_bbreg(hw, 0xe38, MASKDWORD, 0x82140102); in _rtl8723e_phy_path_a_iqk()
1016 rtl_set_bbreg(hw, 0xe3c, MASKDWORD, in _rtl8723e_phy_path_a_iqk()
1020 rtl_set_bbreg(hw, 0xe50, MASKDWORD, 0x10008c22); in _rtl8723e_phy_path_a_iqk()
1021 rtl_set_bbreg(hw, 0xe54, MASKDWORD, 0x10008c22); in _rtl8723e_phy_path_a_iqk()
1022 rtl_set_bbreg(hw, 0xe58, MASKDWORD, 0x82140102); in _rtl8723e_phy_path_a_iqk()
1023 rtl_set_bbreg(hw, 0xe5c, MASKDWORD, 0x28160202); in _rtl8723e_phy_path_a_iqk()
1026 rtl_set_bbreg(hw, 0xe4c, MASKDWORD, 0x001028d1); in _rtl8723e_phy_path_a_iqk()
1027 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf9000000); in _rtl8723e_phy_path_a_iqk()
1028 rtl_set_bbreg(hw, 0xe48, MASKDWORD, 0xf8000000); in _rtl8723e_phy_path_a_iqk()
1056 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000002); in _rtl8723e_phy_path_b_iqk()
1057 rtl_set_bbreg(hw, 0xe60, MASKDWORD, 0x00000000); in _rtl8723e_phy_path_b_iqk()
1172 rtl_set_bbreg(hw, 0xc04, MASKDWORD, 0x03a05600); in _rtl8723e_phy_iq_calibrate()
1173 rtl_set_bbreg(hw, 0xc08, MASKDWORD, 0x000800e4); in _rtl8723e_phy_iq_calibrate()
1174 rtl_set_bbreg(hw, 0x874, MASKDWORD, 0x22204000); in _rtl8723e_phy_iq_calibrate()
1176 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000); in _rtl8723e_phy_iq_calibrate()
1177 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00010000); in _rtl8723e_phy_iq_calibrate()
1181 rtl_set_bbreg(hw, 0xb68, MASKDWORD, 0x00080000); in _rtl8723e_phy_iq_calibrate()
1183 rtl_set_bbreg(hw, 0xb6c, MASKDWORD, 0x00080000); in _rtl8723e_phy_iq_calibrate()
1184 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000); in _rtl8723e_phy_iq_calibrate()
1185 rtl_set_bbreg(hw, 0xe40, MASKDWORD, 0x01007c00); in _rtl8723e_phy_iq_calibrate()
1186 rtl_set_bbreg(hw, 0xe44, MASKDWORD, 0x01004800); in _rtl8723e_phy_iq_calibrate()
1239 rtl_set_bbreg(hw, 0xc04, MASKDWORD, rtlphy->reg_c04); in _rtl8723e_phy_iq_calibrate()
1240 rtl_set_bbreg(hw, 0x874, MASKDWORD, rtlphy->reg_874); in _rtl8723e_phy_iq_calibrate()
1241 rtl_set_bbreg(hw, 0xc08, MASKDWORD, rtlphy->reg_c08); in _rtl8723e_phy_iq_calibrate()
1242 rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0); in _rtl8723e_phy_iq_calibrate()
1243 rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00032ed3); in _rtl8723e_phy_iq_calibrate()
1245 rtl_set_bbreg(hw, 0x844, MASKDWORD, 0x00032ed3); in _rtl8723e_phy_iq_calibrate()
1307 rtl_set_bbreg(hw, REG_LEDCFG0, BIT(23), 0x01); in _rtl8723e_phy_set_rfpath_switch()
1308 rtl_set_bbreg(hw, RFPGA0_XAB_RFPARAMETER, BIT(13), 0x01); in _rtl8723e_phy_set_rfpath_switch()
1312 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, in _rtl8723e_phy_set_rfpath_switch()
1315 rtl_set_bbreg(hw, RFPGA0_XB_RFINTERFACEOE, in _rtl8723e_phy_set_rfpath_switch()
1319 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x2); in _rtl8723e_phy_set_rfpath_switch()
1321 rtl_set_bbreg(hw, RFPGA0_XA_RFINTERFACEOE, 0x300, 0x1); in _rtl8723e_phy_set_rfpath_switch()