68 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1);  in rtl8723e_dm_false_alarm_counter_statistics()
80 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);  in rtl8723e_dm_false_alarm_counter_statistics()
81 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);  in rtl8723e_dm_false_alarm_counter_statistics()
82 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);  in rtl8723e_dm_false_alarm_counter_statistics()
83 	rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);  in rtl8723e_dm_false_alarm_counter_statistics()
277 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,  in rtl8723e_dm_cck_packet_detection_thresh()
280 					rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2,  in rtl8723e_dm_cck_packet_detection_thresh()
287 			rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40);  in rtl8723e_dm_cck_packet_detection_thresh()
290 			rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);  in rtl8723e_dm_cck_packet_detection_thresh()
291 			rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47);  in rtl8723e_dm_cck_packet_detection_thresh()
428 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,  in rtl8723e_dm_write_dig()
430 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,  in rtl8723e_dm_write_dig()
681 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
683 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
685 			rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0);  in rtl8723e_dm_rf_saving()
686 			rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL,  in rtl8723e_dm_rf_saving()
688 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
690 			rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3);  in rtl8723e_dm_rf_saving()
691 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);  in rtl8723e_dm_rf_saving()
692 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x1);  in rtl8723e_dm_rf_saving()
694 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()
696 			rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3),  in rtl8723e_dm_rf_saving()
698 			rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000,  in rtl8723e_dm_rf_saving()
700 			rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74);  in rtl8723e_dm_rf_saving()
701 			rtl_set_bbreg(hw, 0x818, BIT(28), 0x0);  in rtl8723e_dm_rf_saving()
702 			rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW,  in rtl8723e_dm_rf_saving()