Lines Matching refs:rtl_set_bbreg
158 rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, in _rtl92cu_phy_config_bb_with_headerfile()
168 rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, in _rtl92cu_phy_config_bb_with_headerfile()
300 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); in rtl92cu_phy_set_bw_mode_callback()
301 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); in rtl92cu_phy_set_bw_mode_callback()
302 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); in rtl92cu_phy_set_bw_mode_callback()
305 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); in rtl92cu_phy_set_bw_mode_callback()
306 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); in rtl92cu_phy_set_bw_mode_callback()
307 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND, in rtl92cu_phy_set_bw_mode_callback()
309 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl92cu_phy_set_bw_mode_callback()
310 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0); in rtl92cu_phy_set_bw_mode_callback()
311 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), in rtl92cu_phy_set_bw_mode_callback()
330 rtl_set_bbreg(hw, RFPGA0_RFMOD, BCCKEN, 0x1); in rtl92cu_bb_block_on()
331 rtl_set_bbreg(hw, RFPGA0_RFMOD, BOFDMEN, 0x1); in rtl92cu_bb_block_on()