Lines Matching refs:rtl_set_bbreg
180 rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, in _rtl92ce_phy_config_bb_with_headerfile()
190 rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, in _rtl92ce_phy_config_bb_with_headerfile()
327 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0); in rtl92ce_phy_set_bw_mode_callback()
328 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0); in rtl92ce_phy_set_bw_mode_callback()
329 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1); in rtl92ce_phy_set_bw_mode_callback()
332 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1); in rtl92ce_phy_set_bw_mode_callback()
333 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1); in rtl92ce_phy_set_bw_mode_callback()
335 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND, in rtl92ce_phy_set_bw_mode_callback()
337 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc); in rtl92ce_phy_set_bw_mode_callback()
338 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0); in rtl92ce_phy_set_bw_mode_callback()
340 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)), in rtl92ce_phy_set_bw_mode_callback()