119 	Q_WRITE(dev, q, ring_size, q->ndesc);  in mt76_dma_sync_idx()
129 	if (!q || !q->ndesc)  in mt76_dma_queue_reset()
133 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_queue_reset()
160 		q->head = (q->head + 1) % q->ndesc;  in mt76_dma_add_buf()
239 	if (!q || !q->ndesc)  in mt76_dma_tx_cleanup()
314 	q->tail = (q->tail + 1) % q->ndesc;  in mt76_dma_dequeue()
327 	if (q->queued + 1 >= q->ndesc - 1)  in mt76_dma_tx_queue_skb_raw()
402 	if (q->queued + (tx_info.nbuf + 1) / 2 >= q->ndesc - 1) {  in mt76_dma_tx_queue_skb()
453 	if (!q->ndesc)  in mt76_dma_rx_fill()
458 	while (q->queued < q->ndesc - 1) {  in mt76_dma_rx_fill()
541 	q->ndesc = n_desc;  in mt76_dma_alloc_queue()
545 	size = q->ndesc * sizeof(struct mt76_desc);  in mt76_dma_alloc_queue()
550 	size = q->ndesc * sizeof(*q->entry);  in mt76_dma_alloc_queue()
572 	if (!q->ndesc)  in mt76_dma_rx_cleanup()
599 	if (!q->ndesc)  in mt76_dma_rx_reset()
602 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_rx_reset()