81 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_ctxt_info_gen3_init()  local
91 	switch (trans_pcie->rx_buf_size) {  in iwl_pcie_ctxt_info_gen3_init()
113 					  &trans_pcie->prph_scratch_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
133 		cpu_to_le64(trans_pcie->rxq->bd_dma);  in iwl_pcie_ctxt_info_gen3_init()
156 				       &trans_pcie->prph_info_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
166 					    &trans_pcie->ctxt_info_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
174 		cpu_to_le64(trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
176 		cpu_to_le64(trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
180 		cpu_to_le64(trans_pcie->rxq->rb_stts_dma);  in iwl_pcie_ctxt_info_gen3_init()
182 		cpu_to_le64(trans_pcie->prph_info_dma_addr + PAGE_SIZE / 2);  in iwl_pcie_ctxt_info_gen3_init()
184 		cpu_to_le64(trans_pcie->prph_info_dma_addr + 3 * PAGE_SIZE / 4);  in iwl_pcie_ctxt_info_gen3_init()
188 		cpu_to_le64(trans_pcie->rxq->used_bd_dma);  in iwl_pcie_ctxt_info_gen3_init()
194 	trans_pcie->ctxt_info_gen3 = ctxt_info_gen3;  in iwl_pcie_ctxt_info_gen3_init()
195 	trans_pcie->prph_info = prph_info;  in iwl_pcie_ctxt_info_gen3_init()
196 	trans_pcie->prph_scratch = prph_scratch;  in iwl_pcie_ctxt_info_gen3_init()
199 	trans_pcie->iml = dma_alloc_coherent(trans->dev, trans->iml_len,  in iwl_pcie_ctxt_info_gen3_init()
200 					     &trans_pcie->iml_dma_addr,  in iwl_pcie_ctxt_info_gen3_init()
202 	if (!trans_pcie->iml) {  in iwl_pcie_ctxt_info_gen3_init()
207 	memcpy(trans_pcie->iml, trans->iml, trans->iml_len);  in iwl_pcie_ctxt_info_gen3_init()
213 		    trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
215 		    trans_pcie->iml_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
224 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),  in iwl_pcie_ctxt_info_gen3_init()
225 			  trans_pcie->ctxt_info_gen3,  in iwl_pcie_ctxt_info_gen3_init()
226 			  trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
227 	trans_pcie->ctxt_info_gen3 = NULL;  in iwl_pcie_ctxt_info_gen3_init()
230 			  trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
236 			trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_init()
243 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_pcie_ctxt_info_gen3_free()  local
245 	if (trans_pcie->iml) {  in iwl_pcie_ctxt_info_gen3_free()
246 		dma_free_coherent(trans->dev, trans->iml_len, trans_pcie->iml,  in iwl_pcie_ctxt_info_gen3_free()
247 				  trans_pcie->iml_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
248 		trans_pcie->iml_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
249 		trans_pcie->iml = NULL;  in iwl_pcie_ctxt_info_gen3_free()
257 	if (!trans_pcie->ctxt_info_gen3)  in iwl_pcie_ctxt_info_gen3_free()
261 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_gen3),  in iwl_pcie_ctxt_info_gen3_free()
262 			  trans_pcie->ctxt_info_gen3,  in iwl_pcie_ctxt_info_gen3_free()
263 			  trans_pcie->ctxt_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
264 	trans_pcie->ctxt_info_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
265 	trans_pcie->ctxt_info_gen3 = NULL;  in iwl_pcie_ctxt_info_gen3_free()
267 	dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch),  in iwl_pcie_ctxt_info_gen3_free()
268 			  trans_pcie->prph_scratch,  in iwl_pcie_ctxt_info_gen3_free()
269 			  trans_pcie->prph_scratch_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
270 	trans_pcie->prph_scratch_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
271 	trans_pcie->prph_scratch = NULL;  in iwl_pcie_ctxt_info_gen3_free()
274 	dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info,  in iwl_pcie_ctxt_info_gen3_free()
275 			  trans_pcie->prph_info_dma_addr);  in iwl_pcie_ctxt_info_gen3_free()
276 	trans_pcie->prph_info_dma_addr = 0;  in iwl_pcie_ctxt_info_gen3_free()
277 	trans_pcie->prph_info = NULL;  in iwl_pcie_ctxt_info_gen3_free()
283 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_ctx_info_gen3_set_pnvm()  local
285 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
297 						   &trans_pcie->pnvm_dram);  in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
306 		cpu_to_le64(trans_pcie->pnvm_dram.physical);  in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
308 		cpu_to_le32(trans_pcie->pnvm_dram.size);  in iwl_trans_pcie_ctx_info_gen3_set_pnvm()
316 	struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);  in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()  local
318 		&trans_pcie->prph_scratch->ctrl_cfg;  in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
330 					   &trans_pcie->reduce_power_dram);  in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
340 		cpu_to_le64(trans_pcie->reduce_power_dram.physical);  in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()
342 		cpu_to_le32(trans_pcie->reduce_power_dram.size);  in iwl_trans_pcie_ctx_info_gen3_set_reduce_power()