1312 				struct txpwr_limits *txpwr)  in wlc_phy_txpower_target_set()  argument
1318 	       &txpwr->cck[0], BRCMS_NUM_RATES_CCK);  in wlc_phy_txpower_target_set()
1321 	       &txpwr->ofdm[0], BRCMS_NUM_RATES_OFDM);  in wlc_phy_txpower_target_set()
1323 	       &txpwr->ofdm_cdd[0], BRCMS_NUM_RATES_OFDM);  in wlc_phy_txpower_target_set()
1326 	       &txpwr->ofdm_40_siso[0], BRCMS_NUM_RATES_OFDM);  in wlc_phy_txpower_target_set()
1328 	       &txpwr->ofdm_40_cdd[0], BRCMS_NUM_RATES_OFDM);  in wlc_phy_txpower_target_set()
1331 	       &txpwr->mcs_20_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1333 	       &txpwr->mcs_20_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1335 	       &txpwr->mcs_20_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1337 	       &txpwr->mcs_20_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM);  in wlc_phy_txpower_target_set()
1340 	       &txpwr->mcs_40_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1342 	       &txpwr->mcs_40_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1344 	       &txpwr->mcs_40_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM);  in wlc_phy_txpower_target_set()
1346 	       &txpwr->mcs_40_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM);  in wlc_phy_txpower_target_set()
1644 wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr,  in wlc_phy_txpower_reg_limit_calc()  argument
1653 		pi->txpwr_limit[rate1] = txpwr->cck[rate2];  in wlc_phy_txpower_reg_limit_calc()
1657 		pi->txpwr_limit[rate1] = txpwr->ofdm[rate2];  in wlc_phy_txpower_reg_limit_calc()
1665 				txpwr_ptr1 = txpwr->mcs_20_siso;  in wlc_phy_txpower_reg_limit_calc()
1666 				txpwr_ptr2 = txpwr->ofdm;  in wlc_phy_txpower_reg_limit_calc()
1671 				txpwr_ptr1 = txpwr->mcs_20_cdd;  in wlc_phy_txpower_reg_limit_calc()
1672 				txpwr_ptr2 = txpwr->ofdm_cdd;  in wlc_phy_txpower_reg_limit_calc()
1677 				txpwr_ptr1 = txpwr->mcs_40_siso;  in wlc_phy_txpower_reg_limit_calc()
1678 				txpwr_ptr2 = txpwr->ofdm_40_siso;  in wlc_phy_txpower_reg_limit_calc()
1684 				txpwr_ptr1 = txpwr->mcs_40_cdd;  in wlc_phy_txpower_reg_limit_calc()
1685 				txpwr_ptr2 = txpwr->ofdm_40_cdd;  in wlc_phy_txpower_reg_limit_calc()
1711 				txpwr_ptr1 = txpwr->ofdm;  in wlc_phy_txpower_reg_limit_calc()
1712 				txpwr_ptr2 = txpwr->mcs_20_siso;  in wlc_phy_txpower_reg_limit_calc()
1717 				txpwr_ptr1 = txpwr->ofdm_cdd;  in wlc_phy_txpower_reg_limit_calc()
1718 				txpwr_ptr2 = txpwr->mcs_20_cdd;  in wlc_phy_txpower_reg_limit_calc()
1723 				txpwr_ptr1 = txpwr->ofdm_40_siso;  in wlc_phy_txpower_reg_limit_calc()
1724 				txpwr_ptr2 = txpwr->mcs_40_siso;  in wlc_phy_txpower_reg_limit_calc()
1729 				txpwr_ptr1 = txpwr->ofdm_40_cdd;  in wlc_phy_txpower_reg_limit_calc()
1730 				txpwr_ptr2 = txpwr->mcs_40_cdd;  in wlc_phy_txpower_reg_limit_calc()
1757 				txpwr_ptr1 = txpwr->mcs_20_stbc;  in wlc_phy_txpower_reg_limit_calc()
1762 				txpwr_ptr1 = txpwr->mcs_40_stbc;  in wlc_phy_txpower_reg_limit_calc()
1776 				txpwr_ptr1 = txpwr->mcs_20_mimo;  in wlc_phy_txpower_reg_limit_calc()
1781 				txpwr_ptr1 = txpwr->mcs_40_mimo;  in wlc_phy_txpower_reg_limit_calc()
1790 		pi->txpwr_limit[WL_TX_POWER_MCS_32] = txpwr->mcs32;  in wlc_phy_txpower_reg_limit_calc()
1844 wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, struct txpwr_limits *txpwr,  in wlc_phy_txpower_limit_set()  argument
1849 	wlc_phy_txpower_reg_limit_calc(pi, txpwr, chanspec);  in wlc_phy_txpower_limit_set()
1855 			if (txpwr->mcs_20_siso[j])  in wlc_phy_txpower_limit_set()
1856 				pi->txpwr_limit[i] = txpwr->mcs_20_siso[j];  in wlc_phy_txpower_limit_set()
1858 				pi->txpwr_limit[i] = txpwr->ofdm[j];  in wlc_phy_txpower_limit_set()