Lines Matching refs:REG_WRITE
217 REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0), in ar9002_hw_configpcipowersave()
223 REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00); in ar9002_hw_configpcipowersave()
224 REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); in ar9002_hw_configpcipowersave()
227 REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039); in ar9002_hw_configpcipowersave()
228 REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824); in ar9002_hw_configpcipowersave()
229 REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579); in ar9002_hw_configpcipowersave()
235 REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff); in ar9002_hw_configpcipowersave()
237 REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40); in ar9002_hw_configpcipowersave()
238 REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554); in ar9002_hw_configpcipowersave()
239 REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007); in ar9002_hw_configpcipowersave()
242 REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); in ar9002_hw_configpcipowersave()
289 REG_WRITE(ah, AR_WA, val); in ar9002_hw_configpcipowersave()
317 REG_WRITE(ah, AR_WA, val); in ar9002_hw_configpcipowersave()
331 REG_WRITE(ah, AR_PHY(0x36), 0x00007058); in ar9002_hw_get_radiorev()
333 REG_WRITE(ah, AR_PHY(0x20), 0x00010000); in ar9002_hw_get_radiorev()
347 REG_WRITE(ah, AR_PHY(0), 0x00000007); in ar9002_hw_rf_claim()
448 REG_WRITE(ah, reg, val|val_orig); in ar9002_hw_load_ani_reg()
450 REG_WRITE(ah, reg, val); in ar9002_hw_load_ani_reg()