291 		ath5k_hw_reg_write(ah,  in ath5k_hw_set_tx_retry_limits()
304 		ath5k_hw_reg_write(ah,  in ath5k_hw_set_tx_retry_limits()
340 	ath5k_hw_reg_write(ah,  in ath5k_hw_reset_tx_queue()
367 		ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_cbr_period,  in ath5k_hw_reset_tx_queue()
383 		ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_ready_time,  in ath5k_hw_reset_tx_queue()
389 		ath5k_hw_reg_write(ah, AR5K_REG_SM(tq->tqi_burst_time,  in ath5k_hw_reset_tx_queue()
401 		ath5k_hw_reg_write(ah, AR5K_DCU_MISC_POST_FR_BKOFF_DIS,  in ath5k_hw_reset_tx_queue()
406 		ath5k_hw_reg_write(ah, AR5K_DCU_MISC_BACKOFF_FRAG,  in ath5k_hw_reset_tx_queue()
434 		ath5k_hw_reg_write(ah, ((tq->tqi_ready_time -  in ath5k_hw_reset_tx_queue()
502 	ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txq_imr_txok,  in ath5k_hw_reset_tx_queue()
508 	ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txq_imr_txerr,  in ath5k_hw_reset_tx_queue()
520 	ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txq_imr_cbrorn,  in ath5k_hw_reset_tx_queue()
526 	ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txq_imr_qtrig,  in ath5k_hw_reset_tx_queue()
530 	ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txq_imr_nofrm,  in ath5k_hw_reset_tx_queue()
536 		ath5k_hw_reg_write(ah, 0, AR5K_TXNOFRM);  in ath5k_hw_reset_tx_queue()
635 		ath5k_hw_reg_write(ah, slot_time_clock, AR5K_SLOT_TIME);  in ath5k_hw_set_ifs_intervals()
650 		ath5k_hw_reg_write(ah, (difs_clock <<  in ath5k_hw_set_ifs_intervals()
655 		ath5k_hw_reg_write(ah, pifs_clock | eifs_clock |  in ath5k_hw_set_ifs_intervals()
663 	ath5k_hw_reg_write(ah, slot_time_clock, AR5K_DCU_GBL_IFS_SLOT);  in ath5k_hw_set_ifs_intervals()
666 	ath5k_hw_reg_write(ah, eifs_clock, AR5K_DCU_GBL_IFS_EIFS);  in ath5k_hw_set_ifs_intervals()
674 	ath5k_hw_reg_write(ah, sifs_clock, AR5K_DCU_GBL_IFS_SIFS);  in ath5k_hw_set_ifs_intervals()