311 		ath5k_hw_reg_write(ah, tx_time, reg);  in ath5k_hw_write_rate_duration()
317 		ath5k_hw_reg_write(ah, tx_time,  in ath5k_hw_write_rate_duration()
385 	ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);  in ath5k_hw_set_lladdr()
386 	ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);  in ath5k_hw_set_lladdr()
413 	ath5k_hw_reg_write(ah,  in ath5k_hw_set_bssid()
416 	ath5k_hw_reg_write(ah,  in ath5k_hw_set_bssid()
468 	ath5k_hw_reg_write(ah, filter0, AR5K_MCAST_FILTER0);  in ath5k_hw_set_mcast_filter()
469 	ath5k_hw_reg_write(ah, filter1, AR5K_MCAST_FILTER1);  in ath5k_hw_set_mcast_filter()
540 	ath5k_hw_reg_write(ah, filter & 0xff, AR5K_RX_FILTER);  in ath5k_hw_set_rx_filter()
544 		ath5k_hw_reg_write(ah, data, AR5K_PHY_ERR_FIL);  in ath5k_hw_set_rx_filter()
611 	ath5k_hw_reg_write(ah, tsf64 & 0xffffffff, AR5K_TSF_L32);  in ath5k_hw_set_tsf64()
612 	ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32);  in ath5k_hw_set_tsf64()
634 	ath5k_hw_reg_write(ah, val, AR5K_BEACON);  in ath5k_hw_reset_tsf()
635 	ath5k_hw_reg_write(ah, val, AR5K_BEACON);  in ath5k_hw_reset_tsf()
695 		ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);  in ath5k_hw_init_beacon_timers()
697 	ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);  in ath5k_hw_init_beacon_timers()
698 	ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1);  in ath5k_hw_init_beacon_timers()
699 	ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2);  in ath5k_hw_init_beacon_timers()
700 	ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3);  in ath5k_hw_init_beacon_timers()
706 	ath5k_hw_reg_write(ah, interval & (AR5K_BEACON_PERIOD |  in ath5k_hw_init_beacon_timers()
716 		ath5k_hw_reg_write(ah, AR5K_ISR_BMISS, AR5K_ISR);  in ath5k_hw_init_beacon_timers()
718 		ath5k_hw_reg_write(ah, AR5K_ISR_BMISS, AR5K_PISR);  in ath5k_hw_init_beacon_timers()
933 	ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);  in ath5k_hw_set_opmode()
934 	ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);  in ath5k_hw_set_opmode()
940 		ath5k_hw_reg_write(ah, beacon_reg, AR5K_BCR);  in ath5k_hw_set_opmode()
978 	ath5k_hw_reg_write(ah, (AR5K_TUNE_RSSI_THRES |  in ath5k_hw_pcu_init()
985 		ath5k_hw_reg_write(ah, 0x000100aa, AR5K_MIC_QOS_CTL);  in ath5k_hw_pcu_init()
986 		ath5k_hw_reg_write(ah, 0x00003210, AR5K_MIC_QOS_SEL);  in ath5k_hw_pcu_init()
991 		ath5k_hw_reg_write(ah,  in ath5k_hw_pcu_init()