Lines Matching refs:AR5K_EEPROM_N_MODES

183 #define AR5K_EEPROM_N_MODES		3  macro
435 	u16	ee_i_cal[AR5K_EEPROM_N_MODES];
436 	u16	ee_q_cal[AR5K_EEPROM_N_MODES];
437 	u16	ee_fixed_bias[AR5K_EEPROM_N_MODES];
438 	u16	ee_turbo_max_power[AR5K_EEPROM_N_MODES];
439 	u16	ee_xr_power[AR5K_EEPROM_N_MODES];
440 	u16	ee_switch_settling[AR5K_EEPROM_N_MODES];
441 	u16	ee_atn_tx_rx[AR5K_EEPROM_N_MODES];
442 	u16	ee_ant_control[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_PCDAC];
443 	u16	ee_ob[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_OBDB];
444 	u16	ee_db[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_OBDB];
445 	u16	ee_tx_end2xlna_enable[AR5K_EEPROM_N_MODES];
446 	u16	ee_tx_end2xpa_disable[AR5K_EEPROM_N_MODES];
447 	u16	ee_tx_frm2xpa_enable[AR5K_EEPROM_N_MODES];
448 	u16	ee_thr_62[AR5K_EEPROM_N_MODES];
449 	u16	ee_xlna_gain[AR5K_EEPROM_N_MODES];
450 	u16	ee_xpd[AR5K_EEPROM_N_MODES];
451 	u16	ee_x_gain[AR5K_EEPROM_N_MODES];
452 	u16	ee_i_gain[AR5K_EEPROM_N_MODES];
453 	u16	ee_margin_tx_rx[AR5K_EEPROM_N_MODES];
454 	u16	ee_switch_settling_turbo[AR5K_EEPROM_N_MODES];
455 	u16	ee_margin_tx_rx_turbo[AR5K_EEPROM_N_MODES];
456 	u16	ee_atn_tx_rx_turbo[AR5K_EEPROM_N_MODES];
459 	u16	ee_false_detect[AR5K_EEPROM_N_MODES];
462 	u8	ee_pd_gains[AR5K_EEPROM_N_MODES];
464 	u8	ee_pdc_to_idx[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_PD_GAINS];
466 	u8	ee_n_piers[AR5K_EEPROM_N_MODES];
472 	u8	ee_rate_target_pwr_num[AR5K_EEPROM_N_MODES];
483 	s16	ee_noise_floor_thr[AR5K_EEPROM_N_MODES];
484 	s8	ee_adc_desired_size[AR5K_EEPROM_N_MODES];
485 	s8	ee_pga_desired_size[AR5K_EEPROM_N_MODES];
486 	s8	ee_adc_desired_size_turbo[AR5K_EEPROM_N_MODES];
487 	s8	ee_pga_desired_size_turbo[AR5K_EEPROM_N_MODES];
494 	u32	ee_antenna[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];