308 #define GetByte(reg)	   ((unsigned)inb(ioaddr + (reg)))  macro
325 	    pr_cont(" %2.2x", GetByte(i));
331 		pr_cont(" %2.2x", GetByte(i));
341 		pr_cont(" %2.2x", GetByte(i));
405     d = GetByte(XIRCREG2_GPR2); /* read MDIO */  in mii_getbit()
992     saved_page = GetByte(XIRCREG_PR);  in xirc2ps_interrupt()
996     int_status = GetByte(XIRCREG_ISR);  in xirc2ps_interrupt()
1003     eth_status = GetByte(XIRCREG_ESR);  in xirc2ps_interrupt()
1006     rx_status  = GetByte(XIRCREG40_RXST0);  in xirc2ps_interrupt()
1008     tx_status = GetByte(XIRCREG40_TXST0);  in xirc2ps_interrupt()
1009     tx_status |= GetByte(XIRCREG40_TXST1) << 8;  in xirc2ps_interrupt()
1019 	rsr = GetByte(XIRCREG0_RSR);  in xirc2ps_interrupt()
1052 			    buf[i] = GetByte(XIRCREG_EDP);  in xirc2ps_interrupt()
1117 	eth_status = GetByte(XIRCREG_ESR);  in xirc2ps_interrupt()
1130 	nn = GetByte(XIRCREG0_PTR);  in xirc2ps_interrupt()
1173 	if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)  in xirc2ps_interrupt()
1335     value = GetByte(XIRCREG42_SWC1) & 0xC0;  in set_multicast_list()
1490     local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4  in do_reset()
1491 				   : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;  in do_reset()
1511 	value = GetByte(XIRCREG_ESR);	 /* read the ESR */  in do_reset()
1520     value = GetByte(XIRCREG1_ECR);  in do_reset()
1564 	    PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);  in do_reset()
1576 	    PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));  in do_reset()
1579 	value = GetByte(XIRCREG_ESR);	 /* read the ESR */  in do_reset()
1607 	if (!(GetByte(0x10) & 0x01))  in do_reset()
1679 		dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;  in init_mii()