Lines Matching refs:tr
505 struct tc35815_regs __iomem *tr = in tc_mdio_read() local
509 tc_writel(MD_CA_Busy | (mii_id << 5) | (regnum & 0x1f), &tr->MD_CA); in tc_mdio_read()
511 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) { in tc_mdio_read()
516 return tc_readl(&tr->MD_Data) & 0xffff; in tc_mdio_read()
522 struct tc35815_regs __iomem *tr = in tc_mdio_write() local
526 tc_writel(val, &tr->MD_Data); in tc_mdio_write()
528 &tr->MD_CA); in tc_mdio_write()
530 while (tc_readl(&tr->MD_CA) & MD_CA_Busy) { in tc_mdio_write()
548 struct tc35815_regs __iomem *tr = in tc_handle_link_change() local
552 reg = tc_readl(&tr->MAC_Ctl); in tc_handle_link_change()
554 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
559 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
561 tc_writel(reg, &tr->MAC_Ctl); in tc_handle_link_change()
574 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, in tc_handle_link_change()
575 &tr->Tx_Ctl); in tc_handle_link_change()
726 struct tc35815_regs __iomem *tr = in tc35815_init_dev_addr() local
731 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) in tc35815_init_dev_addr()
735 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl); in tc35815_init_dev_addr()
736 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy) in tc35815_init_dev_addr()
738 data = tc_readl(&tr->PROM_Data); in tc35815_init_dev_addr()
1184 struct tc35815_regs __iomem *tr = in tc35815_schedule_restart() local
1190 tc_writel(0, &tr->Int_En); in tc35815_schedule_restart()
1191 tc_writel(tc_readl(&tr->DMA_Ctl) | DMA_IntMask, &tr->DMA_Ctl); in tc35815_schedule_restart()
1198 struct tc35815_regs __iomem *tr = in tc35815_tx_timeout() local
1202 dev->name, tc_readl(&tr->Tx_Stat)); in tc35815_tx_timeout()
1313 struct tc35815_regs __iomem *tr = in tc35815_send_packet() local
1322 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); in tc35815_send_packet()
1433 struct tc35815_regs __iomem *tr = in tc35815_interrupt() local
1435 u32 dmactl = tc_readl(&tr->DMA_Ctl); in tc35815_interrupt()
1439 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl); in tc35815_interrupt()
1447 (void)tc_readl(&tr->Int_Src); /* flush */ in tc35815_interrupt()
1626 struct tc35815_regs __iomem *tr = in tc35815_poll() local
1635 status = tc_readl(&tr->Int_Src); in tc35815_poll()
1639 &tr->Int_Src); /* write to clear */ in tc35815_poll()
1644 &tr->Int_Src); in tc35815_poll()
1650 status = tc_readl(&tr->Int_Src); in tc35815_poll()
1657 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl); in tc35815_poll()
1700 struct tc35815_regs __iomem *tr = in tc35815_check_tx_stat() local
1702 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh); in tc35815_check_tx_stat()
1787 struct tc35815_regs __iomem *tr = in tc35815_txdone() local
1813 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr); in tc35815_txdone()
1855 struct tc35815_regs __iomem *tr = in tc35815_get_stats() local
1859 dev->stats.rx_missed_errors += tc_readl(&tr->Miss_Cnt); in tc35815_get_stats()
1868 struct tc35815_regs __iomem *tr = in tc35815_set_cam_entry() local
1874 saved_addr = tc_readl(&tr->CAM_Adr); in tc35815_set_cam_entry()
1881 tc_writel(cam_index - 2, &tr->CAM_Adr); in tc35815_set_cam_entry()
1882 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000; in tc35815_set_cam_entry()
1884 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1886 tc_writel(cam_index + 2, &tr->CAM_Adr); in tc35815_set_cam_entry()
1888 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1891 tc_writel(cam_index, &tr->CAM_Adr); in tc35815_set_cam_entry()
1893 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1895 tc_writel(cam_index + 4, &tr->CAM_Adr); in tc35815_set_cam_entry()
1896 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff; in tc35815_set_cam_entry()
1898 tc_writel(cam_data, &tr->CAM_Data); in tc35815_set_cam_entry()
1901 tc_writel(saved_addr, &tr->CAM_Adr); in tc35815_set_cam_entry()
1915 struct tc35815_regs __iomem *tr = in tc35815_set_multicast_list() local
1927 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1932 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1938 tc_writel(0, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1947 tc_writel(ena_bits, &tr->CAM_Ena); in tc35815_set_multicast_list()
1948 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
1950 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); in tc35815_set_multicast_list()
1951 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_set_multicast_list()
2025 struct tc35815_regs __iomem *tr = in tc35815_chip_reset() local
2029 tc_writel(MAC_Reset, &tr->MAC_Ctl); in tc35815_chip_reset()
2032 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) { in tc35815_chip_reset()
2039 tc_writel(0, &tr->MAC_Ctl); in tc35815_chip_reset()
2042 tc_writel(0, &tr->DMA_Ctl); in tc35815_chip_reset()
2043 tc_writel(0, &tr->TxThrsh); in tc35815_chip_reset()
2044 tc_writel(0, &tr->TxPollCtr); in tc35815_chip_reset()
2045 tc_writel(0, &tr->RxFragSize); in tc35815_chip_reset()
2046 tc_writel(0, &tr->Int_En); in tc35815_chip_reset()
2047 tc_writel(0, &tr->FDA_Bas); in tc35815_chip_reset()
2048 tc_writel(0, &tr->FDA_Lim); in tc35815_chip_reset()
2049 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */ in tc35815_chip_reset()
2050 tc_writel(0, &tr->CAM_Ctl); in tc35815_chip_reset()
2051 tc_writel(0, &tr->Tx_Ctl); in tc35815_chip_reset()
2052 tc_writel(0, &tr->Rx_Ctl); in tc35815_chip_reset()
2053 tc_writel(0, &tr->CAM_Ena); in tc35815_chip_reset()
2054 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */ in tc35815_chip_reset()
2057 tc_writel(DMA_TestMode, &tr->DMA_Ctl); in tc35815_chip_reset()
2059 tc_writel(i, &tr->CAM_Adr); in tc35815_chip_reset()
2060 tc_writel(0, &tr->CAM_Data); in tc35815_chip_reset()
2062 tc_writel(0, &tr->DMA_Ctl); in tc35815_chip_reset()
2068 struct tc35815_regs __iomem *tr = in tc35815_chip_init() local
2076 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena); in tc35815_chip_init()
2077 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl); in tc35815_chip_init()
2081 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl); in tc35815_chip_init()
2083 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl); in tc35815_chip_init()
2084 tc_writel(0, &tr->TxPollCtr); /* Batch mode */ in tc35815_chip_init()
2085 tc_writel(TX_THRESHOLD, &tr->TxThrsh); in tc35815_chip_init()
2086 tc_writel(INT_EN_CMD, &tr->Int_En); in tc35815_chip_init()
2089 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas); in tc35815_chip_init()
2091 &tr->FDA_Lim); in tc35815_chip_init()
2097 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */ in tc35815_chip_init()
2098 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */ in tc35815_chip_init()
2107 tc_writel(txctl, &tr->Tx_Ctl); in tc35815_chip_init()