49 				    int phyreg, u32 *hw_addr)  in stmmac_xgmac2_c45_format()  argument
58 	*hw_addr = (phyaddr << MII_XGMAC_PA_SHIFT) | (phyreg & 0xffff);  in stmmac_xgmac2_c45_format()
59 	*hw_addr |= (phyreg >> MII_DEVADDR_C45_SHIFT) << MII_XGMAC_DA_SHIFT;  in stmmac_xgmac2_c45_format()
64 				    int phyreg, u32 *hw_addr)  in stmmac_xgmac2_c22_format()  argument
78 	*hw_addr = (phyaddr << MII_XGMAC_PA_SHIFT) | (phyreg & 0x1f);  in stmmac_xgmac2_c22_format()
82 static int stmmac_xgmac2_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)  in stmmac_xgmac2_mdio_read()  argument
102 	if (phyreg & MII_ADDR_C45) {  in stmmac_xgmac2_mdio_read()
103 		phyreg &= ~MII_ADDR_C45;  in stmmac_xgmac2_mdio_read()
105 		ret = stmmac_xgmac2_c45_format(priv, phyaddr, phyreg, &addr);  in stmmac_xgmac2_mdio_read()
109 		ret = stmmac_xgmac2_c22_format(priv, phyaddr, phyreg, &addr);  in stmmac_xgmac2_mdio_read()
148 				    int phyreg, u16 phydata)  in stmmac_xgmac2_mdio_write()  argument
168 	if (phyreg & MII_ADDR_C45) {  in stmmac_xgmac2_mdio_write()
169 		phyreg &= ~MII_ADDR_C45;  in stmmac_xgmac2_mdio_write()
171 		ret = stmmac_xgmac2_c45_format(priv, phyaddr, phyreg, &addr);  in stmmac_xgmac2_mdio_write()
175 		ret = stmmac_xgmac2_c22_format(priv, phyaddr, phyreg, &addr);  in stmmac_xgmac2_mdio_write()
218 static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)  in stmmac_mdio_read()  argument
234 	value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;  in stmmac_mdio_read()
239 		if (phyreg & MII_ADDR_C45) {  in stmmac_mdio_read()
242 			value |= ((phyreg >> MII_DEVADDR_C45_SHIFT) <<  in stmmac_mdio_read()
246 			data |= (phyreg & MII_REGADDR_C45_MASK) <<  in stmmac_mdio_read()
283 static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,  in stmmac_mdio_write()  argument
300 	value |= (phyreg << priv->hw->mii.reg_shift) & priv->hw->mii.reg_mask;  in stmmac_mdio_write()
306 		if (phyreg & MII_ADDR_C45) {  in stmmac_mdio_write()
309 			value |= ((phyreg >> MII_DEVADDR_C45_SHIFT) <<  in stmmac_mdio_write()
313 			data |= (phyreg & MII_REGADDR_C45_MASK) <<  in stmmac_mdio_write()