81 	u32 portno = port->portno;  in sparx5_get_dev2g5_status()  local
86 	value = spx5_rd(sparx5, DEV2G5_PCS1G_STICKY(portno));  in sparx5_get_dev2g5_status()
89 		spx5_wr(value, sparx5, DEV2G5_PCS1G_STICKY(portno));  in sparx5_get_dev2g5_status()
92 	value = spx5_rd(sparx5, DEV2G5_PCS1G_LINK_STATUS(portno));  in sparx5_get_dev2g5_status()
104 	value = spx5_rd(sparx5, DEV2G5_PCS1G_ANEG_STATUS(portno));  in sparx5_get_dev2g5_status()
112 			value = spx5_rd(sparx5, DEV2G5_PCS1G_ANEG_CFG(portno));  in sparx5_get_dev2g5_status()
125 	u32 portno = port->portno;  in sparx5_get_sfi_status()  local
134 	dev = sparx5_to_high_dev(portno);  in sparx5_get_sfi_status()
135 	tinst = sparx5_port_dev_index(portno);  in sparx5_get_sfi_status()
215 	if ((sparx5_port_is_2g5(port->portno) &&  in sparx5_port_verify_speed()
217 	    (sparx5_port_is_5g(port->portno)  &&  in sparx5_port_verify_speed()
219 	    (sparx5_port_is_10g(port->portno) &&  in sparx5_port_verify_speed()
228 		    sparx5_port_is_2g5(port->portno))  in sparx5_port_verify_speed()
230 		if (sparx5_port_is_2g5(port->portno))  in sparx5_port_verify_speed()
235 		    sparx5_port_is_2g5(port->portno))  in sparx5_port_verify_speed()
239 		if (port->portno > 47)  in sparx5_port_verify_speed()
271 static int sparx5_port_flush_poll(struct sparx5 *sparx5, u32 portno)  in sparx5_port_flush_poll()  argument
288 			base = (resource == 0 ? 2048 : 0) + SPX5_PRIOS * portno;  in sparx5_port_flush_poll()
306 				portno, mem);  in sparx5_port_flush_poll()
318 		    sparx5_port_dev_index(port->portno) : port->portno;  in sparx5_port_disable()
320 		  sparx5_to_high_dev(port->portno) : TARGET_DEV2G5;  in sparx5_port_disable()
354 		 QFWD_SWITCH_PORT_MODE(port->portno));  in sparx5_port_disable()
360 		 HSCH_PORT_MODE(port->portno));  in sparx5_port_disable()
366 		 QSYS_PAUSE_CFG(port->portno));  in sparx5_port_disable()
373 	spx5_rmw(HSCH_FLUSH_CTRL_FLUSH_PORT_SET(port->portno) |  in sparx5_port_disable()
388 		 HSCH_PORT_MODE(port->portno));  in sparx5_port_disable()
391 	err = sparx5_port_flush_poll(sparx5, port->portno);  in sparx5_port_disable()
421 	spx5_rmw(HSCH_FLUSH_CTRL_FLUSH_PORT_SET(port->portno) |  in sparx5_port_disable()
429 		u32 pcs = sparx5_to_pcs_dev(port->portno);  in sparx5_port_disable()
438 		if (sparx5_port_is_25g(port->portno))  in sparx5_port_disable()
449 			 DEV2G5_PCS1G_CFG(port->portno));  in sparx5_port_disable()
457 			       u32 portno, u32 speed)  in sparx5_port_fifo_sz()  argument
506 	tmp2 = 3000 + ((12000 + 2 * taxi_dist[portno] * 1000)  in sparx5_port_fifo_sz()
519 	u32 portno = port->portno;  in sparx5_port_mux_set()  local
527 		inst = (portno - portno % 4) / 4;  in sparx5_port_mux_set()
533 		if ((portno / 4 % 2) == 0) {  in sparx5_port_mux_set()
542 				 PORT_CONF_USGMII_CFG((portno / 8)));  in sparx5_port_mux_set()
560 	u32 dev             = sparx5_to_high_dev(port->portno);  in sparx5_port_max_tags_set()
561 	u32 tinst           = sparx5_port_dev_index(port->portno);  in sparx5_port_max_tags_set()
575 		DEV2G5_MAC_TAGS_CFG(port->portno));  in sparx5_port_max_tags_set()
577 	if (sparx5_port_is_2g5(port->portno))  in sparx5_port_max_tags_set()
649 		 DSM_MAC_CFG(port->portno));  in sparx5_port_fc_setup()
655 		 DSM_RX_PAUSE_CFG(port->portno));  in sparx5_port_fc_setup()
661 		 QSYS_FWD_PRESSURE(port->portno));  in sparx5_port_fc_setup()
667 		 QSYS_PAUSE_CFG(port->portno));  in sparx5_port_fc_setup()
687 	    ((port->portno % 4) != 0)) {  in sparx5_serdes_set()
752 		 DEV2G5_PCS1G_MODE_CFG(port->portno));  in sparx5_port_pcs_low_set()
757 		DEV2G5_PCS1G_CFG(port->portno));  in sparx5_port_pcs_low_set()
768 			DEV2G5_PCS1G_ANEG_CFG(port->portno));  in sparx5_port_pcs_low_set()
770 		spx5_wr(0, sparx5, DEV2G5_PCS1G_ANEG_CFG(port->portno));  in sparx5_port_pcs_low_set()
781 		 DEV2G5_DEV_RST_CTRL(port->portno));  in sparx5_port_pcs_low_set()
791 	u32 pix = sparx5_port_dev_index(port->portno);  in sparx5_port_pcs_high_set()
792 	u32 dev = sparx5_to_high_dev(port->portno);  in sparx5_port_pcs_high_set()
793 	u32 pcs = sparx5_to_pcs_dev(port->portno);  in sparx5_port_pcs_high_set()
886 		 DEV2G5_MAC_MODE_CFG(port->portno));  in sparx5_port_config_low_set()
893 		DEV2G5_MAC_IFG_CFG(port->portno));  in sparx5_port_config_low_set()
899 		 HSCH_PORT_MODE(port->portno));  in sparx5_port_config_low_set()
905 		DEV2G5_MAC_ENA_CFG(port->portno));  in sparx5_port_config_low_set()
915 		 DEV2G5_DEV_RST_CTRL(port->portno));  in sparx5_port_config_low_set()
930 		sparx5_dev_switch(sparx5, port->portno, high_speed_dev);  in sparx5_port_pcs_set()
955 			 ASM_PORT_CFG(port->portno));  in sparx5_port_pcs_set()
961 			 DSM_BUF_CFG(port->portno));  in sparx5_port_pcs_set()
990 	stop_wm = sparx5_port_fifo_sz(sparx5, port->portno, conf->speed);  in sparx5_port_config()
994 		 DSM_DEV_TX_STOP_WM_CFG(port->portno));  in sparx5_port_config()
1003 		 QFWD_SWITCH_PORT_MODE(port->portno));  in sparx5_port_config()
1018 	u32 devhigh = sparx5_to_high_dev(port->portno);  in sparx5_port_init()
1019 	u32 pix = sparx5_port_dev_index(port->portno);  in sparx5_port_init()
1020 	u32 pcs = sparx5_to_pcs_dev(port->portno);  in sparx5_port_init()
1046 		 DEV2G5_MAC_MAXLEN_CFG(port->portno));  in sparx5_port_init()
1053 		DEV2G5_PCS1G_SD_CFG(port->portno));  in sparx5_port_init()
1063 		 QSYS_PAUSE_CFG(port->portno));  in sparx5_port_init()
1068 		QSYS_ATOP(port->portno));  in sparx5_port_init()
1071 	spx5_wr(PAUSE_DISCARD, sparx5, ANA_CL_CAPTURE_BPDU_CFG(port->portno));  in sparx5_port_init()
1079 		if (!sparx5_port_is_2g5(port->portno))  in sparx5_port_init()
1084 				 DSM_DEV_TX_STOP_WM_CFG(port->portno));  in sparx5_port_init()
1086 		sparx5_dev_switch(sparx5, port->portno, false);  in sparx5_port_init()
1093 			 DEV2G5_DEV_RST_CTRL(port->portno));  in sparx5_port_init()
1100 		DEV2G5_MAC_IFG_CFG(port->portno));  in sparx5_port_init()
1102 	if (sparx5_port_is_2g5(port->portno))  in sparx5_port_init()
1110 		sparx5_dev_switch(sparx5, port->portno, true);  in sparx5_port_init()
1125 	if (sparx5_port_is_25g(port->portno)) {  in sparx5_port_init()
1145 		 QFWD_SWITCH_PORT_MODE(port->portno));  in sparx5_port_enable()