Lines Matching refs:caps
300 dev->caps.reserved_uars = in mlx4_set_num_reserved_uars()
312 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { in mlx4_check_port_params()
313 for (i = 0; i < dev->caps.num_ports - 1; i++) { in mlx4_check_port_params()
321 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_check_port_params()
322 if (!(port_type[i] & dev->caps.supported_type[i+1])) { in mlx4_check_port_params()
335 for (i = 1; i <= dev->caps.num_ports; ++i) in mlx4_set_port_mask()
336 dev->caps.port_mask[i] = dev->caps.port_type[i]; in mlx4_set_port_mask()
348 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { in mlx4_query_func()
364 struct mlx4_caps *dev_cap = &dev->caps; in mlx4_enable_cqe_eqe_stride()
400 dev->caps.vl_cap[port] = port_cap->max_vl; in _mlx4_dev_port()
401 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu; in _mlx4_dev_port()
407 dev->caps.gid_table_len[port] = port_cap->max_gids; in _mlx4_dev_port()
408 dev->caps.pkey_table_len[port] = port_cap->max_pkeys; in _mlx4_dev_port()
409 dev->caps.port_width_cap[port] = port_cap->max_port_width; in _mlx4_dev_port()
410 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu; in _mlx4_dev_port()
411 dev->caps.max_tc_eth = port_cap->max_tc_eth; in _mlx4_dev_port()
412 dev->caps.def_mac[port] = port_cap->def_mac; in _mlx4_dev_port()
413 dev->caps.supported_type[port] = port_cap->supported_port_types; in _mlx4_dev_port()
414 dev->caps.suggested_type[port] = port_cap->suggested_type; in _mlx4_dev_port()
415 dev->caps.default_sense[port] = port_cap->default_sense; in _mlx4_dev_port()
416 dev->caps.trans_type[port] = port_cap->trans_type; in _mlx4_dev_port()
417 dev->caps.vendor_oui[port] = port_cap->vendor_oui; in _mlx4_dev_port()
418 dev->caps.wavelength[port] = port_cap->wavelength; in _mlx4_dev_port()
419 dev->caps.trans_code[port] = port_cap->trans_code; in _mlx4_dev_port()
439 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)) in mlx4_enable_ignore_fcs()
444 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
448 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) { in mlx4_enable_ignore_fcs()
451 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; in mlx4_enable_ignore_fcs()
488 dev->caps.num_ports = dev_cap->num_ports; in mlx4_dev_cap()
489 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs; in mlx4_dev_cap()
491 dev->caps.num_sys_eqs : in mlx4_dev_cap()
493 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
501 dev->caps.map_clock_to_user = dev_cap->map_clock_to_user; in mlx4_dev_cap()
502 dev->caps.uar_page_size = PAGE_SIZE; in mlx4_dev_cap()
503 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; in mlx4_dev_cap()
504 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; in mlx4_dev_cap()
505 dev->caps.bf_reg_size = dev_cap->bf_reg_size; in mlx4_dev_cap()
506 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; in mlx4_dev_cap()
507 dev->caps.max_sq_sg = dev_cap->max_sq_sg; in mlx4_dev_cap()
508 dev->caps.max_rq_sg = dev_cap->max_rq_sg; in mlx4_dev_cap()
509 dev->caps.max_wqes = dev_cap->max_qp_sz; in mlx4_dev_cap()
510 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; in mlx4_dev_cap()
511 dev->caps.max_srq_wqes = dev_cap->max_srq_sz; in mlx4_dev_cap()
512 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; in mlx4_dev_cap()
513 dev->caps.reserved_srqs = dev_cap->reserved_srqs; in mlx4_dev_cap()
514 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; in mlx4_dev_cap()
515 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; in mlx4_dev_cap()
520 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; in mlx4_dev_cap()
521 dev->caps.reserved_cqs = dev_cap->reserved_cqs; in mlx4_dev_cap()
522 dev->caps.reserved_eqs = dev_cap->reserved_eqs; in mlx4_dev_cap()
523 dev->caps.reserved_mtts = dev_cap->reserved_mtts; in mlx4_dev_cap()
524 dev->caps.reserved_mrws = dev_cap->reserved_mrws; in mlx4_dev_cap()
526 dev->caps.reserved_pds = dev_cap->reserved_pds; in mlx4_dev_cap()
527 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
529 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? in mlx4_dev_cap()
531 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; in mlx4_dev_cap()
533 dev->caps.max_msg_sz = dev_cap->max_msg_sz; in mlx4_dev_cap()
534 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); in mlx4_dev_cap()
535 dev->caps.flags = dev_cap->flags; in mlx4_dev_cap()
536 dev->caps.flags2 = dev_cap->flags2; in mlx4_dev_cap()
537 dev->caps.bmme_flags = dev_cap->bmme_flags; in mlx4_dev_cap()
538 dev->caps.reserved_lkey = dev_cap->reserved_lkey; in mlx4_dev_cap()
539 dev->caps.stat_rate_support = dev_cap->stat_rate_support; in mlx4_dev_cap()
540 dev->caps.max_gso_sz = dev_cap->max_gso_sz; in mlx4_dev_cap()
541 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; in mlx4_dev_cap()
542 dev->caps.wol_port[1] = dev_cap->wol_port[1]; in mlx4_dev_cap()
543 dev->caps.wol_port[2] = dev_cap->wol_port[2]; in mlx4_dev_cap()
544 dev->caps.health_buffer_addrs = dev_cap->health_buffer_addrs; in mlx4_dev_cap()
559 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN) { in mlx4_dev_cap()
571 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_PHV_EN; in mlx4_dev_cap()
576 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
579 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; in mlx4_dev_cap()
582 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC; in mlx4_dev_cap()
583 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS; in mlx4_dev_cap()
585 dev->caps.log_num_macs = log_num_mac; in mlx4_dev_cap()
586 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; in mlx4_dev_cap()
589 for (i = 1; i <= dev->caps.num_ports; ++i) { in mlx4_dev_cap()
590 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; in mlx4_dev_cap()
591 if (dev->caps.supported_type[i]) { in mlx4_dev_cap()
593 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_dev_cap()
594 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; in mlx4_dev_cap()
596 else if (dev->caps.supported_type[i] == in mlx4_dev_cap()
598 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; in mlx4_dev_cap()
604 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? in mlx4_dev_cap()
607 dev->caps.port_type[i] = port_type_array[i - 1]; in mlx4_dev_cap()
617 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && in mlx4_dev_cap()
618 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in mlx4_dev_cap()
619 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); in mlx4_dev_cap()
626 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { in mlx4_dev_cap()
628 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; in mlx4_dev_cap()
631 dev->caps.port_type[i] = sensed_port; in mlx4_dev_cap()
633 dev->caps.possible_type[i] = dev->caps.port_type[i]; in mlx4_dev_cap()
636 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) { in mlx4_dev_cap()
637 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs; in mlx4_dev_cap()
639 i, 1 << dev->caps.log_num_macs); in mlx4_dev_cap()
641 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) { in mlx4_dev_cap()
642 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans; in mlx4_dev_cap()
644 i, 1 << dev->caps.log_num_vlans); in mlx4_dev_cap()
648 if (mlx4_is_master(dev) && (dev->caps.num_ports == 2) && in mlx4_dev_cap()
653 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_QOS_VPP; in mlx4_dev_cap()
656 dev->caps.max_counters = dev_cap->max_counters; in mlx4_dev_cap()
658 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; in mlx4_dev_cap()
659 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = in mlx4_dev_cap()
660 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = in mlx4_dev_cap()
661 (1 << dev->caps.log_num_macs) * in mlx4_dev_cap()
662 (1 << dev->caps.log_num_vlans) * in mlx4_dev_cap()
663 dev->caps.num_ports; in mlx4_dev_cap()
664 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; in mlx4_dev_cap()
667 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) in mlx4_dev_cap()
668 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base; in mlx4_dev_cap()
670 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
671 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
674 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) { in mlx4_dev_cap()
675 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range; in mlx4_dev_cap()
676 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT; in mlx4_dev_cap()
677 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_FS_A0; in mlx4_dev_cap()
679 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED; in mlx4_dev_cap()
680 dev->caps.dmfs_high_rate_qpn_base = in mlx4_dev_cap()
681 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_dev_cap()
682 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE; in mlx4_dev_cap()
685 dev->caps.rl_caps = dev_cap->rl_caps; in mlx4_dev_cap()
687 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] = in mlx4_dev_cap()
688 dev->caps.dmfs_high_rate_qpn_range; in mlx4_dev_cap()
690 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + in mlx4_dev_cap()
691 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + in mlx4_dev_cap()
692 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + in mlx4_dev_cap()
693 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; in mlx4_dev_cap()
695 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; in mlx4_dev_cap()
701 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; in mlx4_dev_cap()
702 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; in mlx4_dev_cap()
714 if ((dev->caps.flags & in mlx4_dev_cap()
717 dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE; in mlx4_dev_cap()
721 dev->caps.alloc_res_qp_mask = in mlx4_dev_cap()
722 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) | in mlx4_dev_cap()
725 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) && in mlx4_dev_cap()
726 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { in mlx4_dev_cap()
729 dev->caps.flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG; in mlx4_dev_cap()
733 dev->caps.alloc_res_qp_mask = 0; in mlx4_dev_cap()
846 dev->caps.steering_mode = hca_param->steering_mode; in slave_adjust_steering_mode()
847 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { in slave_adjust_steering_mode()
848 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in slave_adjust_steering_mode()
849 dev->caps.fs_log_max_ucast_qp_range_size = in slave_adjust_steering_mode()
852 dev->caps.num_qp_per_mgm = in slave_adjust_steering_mode()
856 mlx4_steering_mode_str(dev->caps.steering_mode)); in slave_adjust_steering_mode()
861 kfree(dev->caps.spec_qps); in mlx4_slave_destroy_special_qp_cap()
862 dev->caps.spec_qps = NULL; in mlx4_slave_destroy_special_qp_cap()
868 struct mlx4_caps *caps = &dev->caps; in mlx4_slave_special_qp_cap() local
872 caps->spec_qps = kcalloc(caps->num_ports, sizeof(*caps->spec_qps), GFP_KERNEL); in mlx4_slave_special_qp_cap()
874 if (!func_cap || !caps->spec_qps) { in mlx4_slave_special_qp_cap()
880 for (i = 1; i <= caps->num_ports; ++i) { in mlx4_slave_special_qp_cap()
887 caps->spec_qps[i - 1] = func_cap->spec_qps; in mlx4_slave_special_qp_cap()
888 caps->port_mask[i] = caps->port_type[i]; in mlx4_slave_special_qp_cap()
889 caps->phys_port_id[i] = func_cap->phys_port_id; in mlx4_slave_special_qp_cap()
891 &caps->gid_table_len[i], in mlx4_slave_special_qp_cap()
892 &caps->pkey_table_len[i]); in mlx4_slave_special_qp_cap()
939 dev->caps.hca_core_clock = hca_param->hca_core_clock; in mlx4_slave_cap()
941 dev->caps.max_qp_dest_rdma = 1 << hca_param->log_rd_per_qp; in mlx4_slave_cap()
952 page_size = ~dev->caps.page_size_cap + 1; in mlx4_slave_cap()
979 dev->caps.uar_page_size = PAGE_SIZE; in mlx4_slave_cap()
997 dev->caps.num_ports = func_cap->num_ports; in mlx4_slave_cap()
1003 dev->caps.num_qps = 1 << hca_param->log_num_qps; in mlx4_slave_cap()
1004 dev->caps.num_srqs = 1 << hca_param->log_num_srqs; in mlx4_slave_cap()
1005 dev->caps.num_cqs = 1 << hca_param->log_num_cqs; in mlx4_slave_cap()
1006 dev->caps.num_mpts = 1 << hca_param->log_mpt_sz; in mlx4_slave_cap()
1007 dev->caps.num_eqs = func_cap->max_eq; in mlx4_slave_cap()
1008 dev->caps.reserved_eqs = func_cap->reserved_eq; in mlx4_slave_cap()
1009 dev->caps.reserved_lkey = func_cap->reserved_lkey; in mlx4_slave_cap()
1010 dev->caps.num_pds = MLX4_NUM_PDS; in mlx4_slave_cap()
1011 dev->caps.num_mgms = 0; in mlx4_slave_cap()
1012 dev->caps.num_amgms = 0; in mlx4_slave_cap()
1014 if (dev->caps.num_ports > MLX4_MAX_PORTS) { in mlx4_slave_cap()
1016 dev->caps.num_ports, MLX4_MAX_PORTS); in mlx4_slave_cap()
1029 if (dev->caps.uar_page_size * (dev->caps.num_uars - in mlx4_slave_cap()
1030 dev->caps.reserved_uars) > in mlx4_slave_cap()
1034 dev->caps.uar_page_size * dev->caps.num_uars, in mlx4_slave_cap()
1042 dev->caps.eqe_size = 64; in mlx4_slave_cap()
1043 dev->caps.eqe_factor = 1; in mlx4_slave_cap()
1045 dev->caps.eqe_size = 32; in mlx4_slave_cap()
1046 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
1050 dev->caps.cqe_size = 64; in mlx4_slave_cap()
1051 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
1053 dev->caps.cqe_size = 32; in mlx4_slave_cap()
1057 dev->caps.eqe_size = hca_param->eqe_size; in mlx4_slave_cap()
1058 dev->caps.eqe_factor = 0; in mlx4_slave_cap()
1062 dev->caps.cqe_size = hca_param->cqe_size; in mlx4_slave_cap()
1064 dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_LARGE_CQE; in mlx4_slave_cap()
1067 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_slave_cap()
1070 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_USER_MAC_EN; in mlx4_slave_cap()
1078 dev->caps.bf_reg_size) in mlx4_slave_cap()
1079 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_ETH_BF_QP; in mlx4_slave_cap()
1082 dev->caps.alloc_res_qp_mask |= MLX4_RESERVE_A0_QP; in mlx4_slave_cap()
1102 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_request_modules()
1103 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) in mlx4_request_modules()
1105 else if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) in mlx4_request_modules()
1111 if (has_ib_port || (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) in mlx4_request_modules()
1126 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_change_port_types()
1129 if (port_types[port] != dev->caps.port_type[port + 1]) in mlx4_change_port_types()
1134 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_change_port_types()
1136 dev->caps.port_type[port] = port_types[port - 1]; in mlx4_change_port_types()
1167 (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? in show_port_type()
1169 if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) in show_port_type()
1187 if ((port_type & mdev->caps.supported_type[info->port]) != port_type) { in __set_port_type()
1199 mdev->caps.possible_type[info->port] = info->tmp_type; in __set_port_type()
1201 for (i = 0; i < mdev->caps.num_ports; i++) { in __set_port_type()
1203 mdev->caps.possible_type[i+1]; in __set_port_type()
1205 types[i] = mdev->caps.port_type[i+1]; in __set_port_type()
1208 if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && in __set_port_type()
1209 !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { in __set_port_type()
1210 for (i = 1; i <= mdev->caps.num_ports; i++) { in __set_port_type()
1211 if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { in __set_port_type()
1212 mdev->caps.possible_type[i] = mdev->caps.port_type[i]; in __set_port_type()
1231 for (i = 0; i < mdev->caps.num_ports; i++) in __set_port_type()
1316 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) in show_port_ib_mtu()
1320 ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); in show_port_ib_mtu()
1334 if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { in set_port_ib_mtu()
1348 mdev->caps.port_ib_mtu[info->port] = ibta_mtu; in set_port_ib_mtu()
1353 for (port = 1; port <= mdev->caps.num_ports; port++) { in set_port_ib_mtu()
1404 if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) { in mlx4_mf_bond()
1512 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)) in mlx4_port_map_set()
1594 cmpt_entry_sz, dev->caps.num_qps, in mlx4_init_cmpt_table()
1595 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_cmpt_table()
1604 cmpt_entry_sz, dev->caps.num_srqs, in mlx4_init_cmpt_table()
1605 dev->caps.reserved_srqs, 0, 0); in mlx4_init_cmpt_table()
1613 cmpt_entry_sz, dev->caps.num_cqs, in mlx4_init_cmpt_table()
1614 dev->caps.reserved_cqs, 0, 0); in mlx4_init_cmpt_table()
1696 dev->caps.reserved_mtts = in mlx4_init_icm()
1697 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, in mlx4_init_icm()
1698 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; in mlx4_init_icm()
1702 dev->caps.mtt_entry_sz, in mlx4_init_icm()
1703 dev->caps.num_mtts, in mlx4_init_icm()
1704 dev->caps.reserved_mtts, 1, 0); in mlx4_init_icm()
1713 dev->caps.num_mpts, in mlx4_init_icm()
1714 dev->caps.reserved_mrws, 1, 1); in mlx4_init_icm()
1723 dev->caps.num_qps, in mlx4_init_icm()
1724 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1734 dev->caps.num_qps, in mlx4_init_icm()
1735 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1745 dev->caps.num_qps, in mlx4_init_icm()
1746 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1756 dev->caps.num_qps, in mlx4_init_icm()
1757 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], in mlx4_init_icm()
1767 dev->caps.num_cqs, in mlx4_init_icm()
1768 dev->caps.reserved_cqs, 0, 0); in mlx4_init_icm()
1777 dev->caps.num_srqs, in mlx4_init_icm()
1778 dev->caps.reserved_srqs, 0, 0); in mlx4_init_icm()
1794 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1795 dev->caps.num_mgms + dev->caps.num_amgms, in mlx4_init_icm()
1887 if (!dev->caps.bf_reg_size) in map_bf_area()
1891 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1893 (dev->caps.num_uars << PAGE_SHIFT); in map_bf_area()
1952 if (!dev->caps.map_clock_to_user) { in mlx4_get_internal_clock_params()
2045 dev->caps.vf_caps |= MLX4_VF_CAP_FLAG_RESET; in mlx4_reset_vf_support()
2122 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_parav_master_pf_caps()
2123 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) in mlx4_parav_master_pf_caps()
2124 dev->caps.gid_table_len[i] = in mlx4_parav_master_pf_caps()
2127 dev->caps.gid_table_len[i] = 1; in mlx4_parav_master_pf_caps()
2128 dev->caps.pkey_table_len[i] = in mlx4_parav_master_pf_caps()
2176 if (dev->caps.dmfs_high_steer_mode == in choose_steering_mode()
2180 dev->caps.dmfs_high_steer_mode = in choose_steering_mode()
2194 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; in choose_steering_mode()
2195 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; in choose_steering_mode()
2196 dev->caps.fs_log_max_ucast_qp_range_size = in choose_steering_mode()
2199 if (dev->caps.dmfs_high_steer_mode != in choose_steering_mode()
2201 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE; in choose_steering_mode()
2202 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && in choose_steering_mode()
2203 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
2204 dev->caps.steering_mode = MLX4_STEERING_MODE_B0; in choose_steering_mode()
2206 dev->caps.steering_mode = MLX4_STEERING_MODE_A0; in choose_steering_mode()
2208 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER || in choose_steering_mode()
2209 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) in choose_steering_mode()
2216 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); in choose_steering_mode()
2219 mlx4_steering_mode_str(dev->caps.steering_mode), in choose_steering_mode()
2227 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED && in choose_tunnel_offload_mode()
2229 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN; in choose_tunnel_offload_mode()
2231 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE; in choose_tunnel_offload_mode()
2233 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode in choose_tunnel_offload_mode()
2242 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED) in mlx4_validate_optimized_steering()
2245 for (i = 1; i <= dev->caps.num_ports; i++) { in mlx4_validate_optimized_steering()
2249 } else if ((dev->caps.dmfs_high_steer_mode != in mlx4_validate_optimized_steering()
2252 !!(dev->caps.dmfs_high_steer_mode == in mlx4_validate_optimized_steering()
2257 dev->caps.dmfs_high_steer_mode), in mlx4_validate_optimized_steering()
2326 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC && in mlx4_init_hca()
2328 dev->caps.function_caps |= MLX4_FUNC_CAP_DMFS_A0_STATIC; in mlx4_init_hca()
2343 if (dev->caps.steering_mode == in mlx4_init_hca()
2355 init_hca->log_uar_sz = ilog2(dev->caps.num_uars) + in mlx4_init_hca()
2359 init_hca->log_uar_sz = ilog2(dev->caps.num_uars); in mlx4_init_hca()
2364 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || in mlx4_init_hca()
2365 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) in mlx4_init_hca()
2384 dev->caps.num_eqs = dev_cap->max_eqs; in mlx4_init_hca()
2385 dev->caps.reserved_eqs = dev_cap->reserved_eqs; in mlx4_init_hca()
2386 dev->caps.reserved_uars = dev_cap->reserved_uars; in mlx4_init_hca()
2394 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { in mlx4_init_hca()
2398 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2400 dev->caps.hca_core_clock = in mlx4_init_hca()
2407 if (!dev->caps.hca_core_clock) { in mlx4_init_hca()
2408 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2416 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; in mlx4_init_hca()
2421 if (dev->caps.dmfs_high_steer_mode != in mlx4_init_hca()
2426 if (dev->caps.dmfs_high_steer_mode == in mlx4_init_hca()
2428 dev->caps.dmfs_high_rate_qpn_base = in mlx4_init_hca()
2429 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; in mlx4_init_hca()
2430 dev->caps.dmfs_high_rate_qpn_range = in mlx4_init_hca()
2436 dev->caps.dmfs_high_steer_mode)); in mlx4_init_hca()
2471 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1; in mlx4_init_hca()
2472 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2; in mlx4_init_hca()
2509 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in mlx4_init_counters_table()
2512 if (!dev->caps.max_counters) in mlx4_init_counters_table()
2515 nent_pow2 = roundup_pow_of_two(dev->caps.max_counters); in mlx4_init_counters_table()
2519 nent_pow2 - dev->caps.max_counters + 1); in mlx4_init_counters_table()
2524 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in mlx4_cleanup_counters_table()
2527 if (!dev->caps.max_counters) in mlx4_cleanup_counters_table()
2538 for (port = 0; port < dev->caps.num_ports; port++) in mlx4_cleanup_default_counters()
2549 for (port = 0; port < dev->caps.num_ports; port++) in mlx4_allocate_default_counters()
2552 for (port = 0; port < dev->caps.num_ports; port++) { in mlx4_allocate_default_counters()
2584 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in __mlx4_counter_alloc()
2637 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) in __mlx4_counter_free()
2822 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_setup_hca()
2829 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; in mlx4_setup_hca()
2843 dev->caps.port_ib_mtu[port] = IB_MTU_2048; in mlx4_setup_hca()
2845 dev->caps.port_ib_mtu[port] = IB_MTU_4096; in mlx4_setup_hca()
2848 dev->caps.pkey_table_len[port] : -1); in mlx4_setup_hca()
2913 if (eqn > dev->caps.num_comp_vectors) in mlx4_init_affinity_hint()
2943 int nreq = min3(dev->caps.num_ports * in mlx4_enable_msi_x()
2945 dev->caps.num_eqs - dev->caps.reserved_eqs, in mlx4_enable_msi_x()
2966 dev->caps.num_comp_vectors = nreq - 1; in mlx4_enable_msi_x()
2970 dev->caps.num_ports); in mlx4_enable_msi_x()
2972 for (i = 0; i < dev->caps.num_comp_vectors + 1; i++) { in mlx4_enable_msi_x()
2979 if (MLX4_IS_LEGACY_EQ_MODE(dev->caps)) { in mlx4_enable_msi_x()
2981 dev->caps.num_ports); in mlx4_enable_msi_x()
3001 if ((dev->caps.num_comp_vectors > dev->caps.num_ports) && in mlx4_enable_msi_x()
3003 (dev->caps.num_comp_vectors / dev->caps.num_ports)) == in mlx4_enable_msi_x()
3018 dev->caps.num_comp_vectors = 1; in mlx4_enable_msi_x()
3025 dev->caps.num_ports); in mlx4_enable_msi_x()
3045 dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) in mlx4_init_port_info()
3048 dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) in mlx4_init_port_info()
3126 int num_entries = dev->caps.num_ports; in mlx4_init_steering()
3147 int num_entries = dev->caps.num_ports; in mlx4_clear_steering()
3558 if (dev->caps.num_ports < 2 && in mlx4_load_one()
3563 dev->caps.num_ports); in mlx4_load_one()
3576 dev->caps.num_ports; in mlx4_load_one()
3617 dev->caps.num_comp_vectors = 1; in mlx4_load_one()
3637 for (port = 1; port <= dev->caps.num_ports; port++) { in mlx4_load_one()
4076 for (i = 0; i < dev->caps.num_ports; i++) { in mlx4_unload_one()
4077 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1]; in mlx4_unload_one()
4078 dev->persist->curr_port_poss_type[i] = dev->caps. in mlx4_unload_one()
4087 for (p = 1; p <= dev->caps.num_ports; p++) { in mlx4_unload_one()
4201 for (i = 0; i < dev->caps.num_ports; i++) in restore_current_port_types()
4202 dev->caps.possible_type[i + 1] = poss_types[i]; in restore_current_port_types()