Lines Matching refs:rvu
29 reg = rvu_read64(rvu, blkaddr, CPT_AF_EXEX_STS(e)); \
43 struct rvu *rvu = block->rvu; in rvu_cpt_af_flt_intr_handler() local
47 reg0 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(0)); in rvu_cpt_af_flt_intr_handler()
48 reg1 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(1)); in rvu_cpt_af_flt_intr_handler()
49 if (!is_rvu_otx2(rvu)) { in rvu_cpt_af_flt_intr_handler()
50 reg2 = rvu_read64(rvu, blkaddr, CPT_AF_FLTX_INT(2)); in rvu_cpt_af_flt_intr_handler()
51 dev_err_ratelimited(rvu->dev, in rvu_cpt_af_flt_intr_handler()
55 dev_err_ratelimited(rvu->dev, in rvu_cpt_af_flt_intr_handler()
60 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(0), reg0); in rvu_cpt_af_flt_intr_handler()
61 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(1), reg1); in rvu_cpt_af_flt_intr_handler()
62 if (!is_rvu_otx2(rvu)) in rvu_cpt_af_flt_intr_handler()
63 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT(2), reg2); in rvu_cpt_af_flt_intr_handler()
71 struct rvu *rvu = block->rvu; in rvu_cpt_af_rvu_intr_handler() local
75 reg = rvu_read64(rvu, blkaddr, CPT_AF_RVU_INT); in rvu_cpt_af_rvu_intr_handler()
76 dev_err_ratelimited(rvu->dev, "Received CPTAF RVU irq : 0x%llx", reg); in rvu_cpt_af_rvu_intr_handler()
78 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT, reg); in rvu_cpt_af_rvu_intr_handler()
85 struct rvu *rvu = block->rvu; in rvu_cpt_af_ras_intr_handler() local
89 reg = rvu_read64(rvu, blkaddr, CPT_AF_RAS_INT); in rvu_cpt_af_ras_intr_handler()
90 dev_err_ratelimited(rvu->dev, "Received CPTAF RAS irq : 0x%llx", reg); in rvu_cpt_af_ras_intr_handler()
92 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT, reg); in rvu_cpt_af_ras_intr_handler()
100 struct rvu *rvu = block->rvu; in rvu_cpt_do_register_interrupt() local
103 ret = request_irq(pci_irq_vector(rvu->pdev, irq_offs), handler, 0, in rvu_cpt_do_register_interrupt()
106 dev_err(rvu->dev, "RVUAF: %s irq registration failed", name); in rvu_cpt_do_register_interrupt()
110 WARN_ON(rvu->irq_allocated[irq_offs]); in rvu_cpt_do_register_interrupt()
111 rvu->irq_allocated[irq_offs] = true; in rvu_cpt_do_register_interrupt()
117 struct rvu *rvu = block->rvu; in cpt_10k_unregister_interrupts() local
123 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), 0x1); in cpt_10k_unregister_interrupts()
124 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
125 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1); in cpt_10k_unregister_interrupts()
128 if (rvu->irq_allocated[off + i]) { in cpt_10k_unregister_interrupts()
129 free_irq(pci_irq_vector(rvu->pdev, off + i), block); in cpt_10k_unregister_interrupts()
130 rvu->irq_allocated[off + i] = false; in cpt_10k_unregister_interrupts()
134 static void cpt_unregister_interrupts(struct rvu *rvu, int blkaddr) in cpt_unregister_interrupts() argument
136 struct rvu_hwinfo *hw = rvu->hw; in cpt_unregister_interrupts()
140 if (!is_block_implemented(rvu->hw, blkaddr)) in cpt_unregister_interrupts()
142 offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF; in cpt_unregister_interrupts()
144 dev_warn(rvu->dev, in cpt_unregister_interrupts()
149 if (!is_rvu_otx2(rvu)) in cpt_unregister_interrupts()
154 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1C(i), 0x1); in cpt_unregister_interrupts()
155 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1C, 0x1); in cpt_unregister_interrupts()
156 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1C, 0x1); in cpt_unregister_interrupts()
159 if (rvu->irq_allocated[offs + i]) { in cpt_unregister_interrupts()
160 free_irq(pci_irq_vector(rvu->pdev, offs + i), block); in cpt_unregister_interrupts()
161 rvu->irq_allocated[offs + i] = false; in cpt_unregister_interrupts()
165 void rvu_cpt_unregister_interrupts(struct rvu *rvu) in rvu_cpt_unregister_interrupts() argument
167 cpt_unregister_interrupts(rvu, BLKADDR_CPT0); in rvu_cpt_unregister_interrupts()
168 cpt_unregister_interrupts(rvu, BLKADDR_CPT1); in rvu_cpt_unregister_interrupts()
173 struct rvu *rvu = block->rvu; in cpt_10k_register_interrupts() local
178 sprintf(&rvu->irq_name[(off + i) * NAME_SIZE], "CPTAF FLT%d", i); in cpt_10k_register_interrupts()
181 &rvu->irq_name[(off + i) * NAME_SIZE]); in cpt_10k_register_interrupts()
184 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), 0x1); in cpt_10k_register_interrupts()
192 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1); in cpt_10k_register_interrupts()
199 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1); in cpt_10k_register_interrupts()
203 rvu_cpt_unregister_interrupts(rvu); in cpt_10k_register_interrupts()
207 static int cpt_register_interrupts(struct rvu *rvu, int blkaddr) in cpt_register_interrupts() argument
209 struct rvu_hwinfo *hw = rvu->hw; in cpt_register_interrupts()
214 if (!is_block_implemented(rvu->hw, blkaddr)) in cpt_register_interrupts()
218 offs = rvu_read64(rvu, blkaddr, CPT_PRIV_AF_INT_CFG) & 0x7FF; in cpt_register_interrupts()
220 dev_warn(rvu->dev, in cpt_register_interrupts()
225 if (!is_rvu_otx2(rvu)) in cpt_register_interrupts()
235 rvu_write64(rvu, blkaddr, CPT_AF_FLTX_INT_ENA_W1S(i), 0x1); in cpt_register_interrupts()
243 rvu_write64(rvu, blkaddr, CPT_AF_RVU_INT_ENA_W1S, 0x1); in cpt_register_interrupts()
250 rvu_write64(rvu, blkaddr, CPT_AF_RAS_INT_ENA_W1S, 0x1); in cpt_register_interrupts()
254 rvu_cpt_unregister_interrupts(rvu); in cpt_register_interrupts()
258 int rvu_cpt_register_interrupts(struct rvu *rvu) in rvu_cpt_register_interrupts() argument
262 ret = cpt_register_interrupts(rvu, BLKADDR_CPT0); in rvu_cpt_register_interrupts()
266 return cpt_register_interrupts(rvu, BLKADDR_CPT1); in rvu_cpt_register_interrupts()
269 static int get_cpt_pf_num(struct rvu *rvu) in get_cpt_pf_num() argument
274 domain_nr = pci_domain_nr(rvu->pdev->bus); in get_cpt_pf_num()
275 for (i = 0; i < rvu->hw->total_pfs; i++) { in get_cpt_pf_num()
291 static bool is_cpt_pf(struct rvu *rvu, u16 pcifunc) in is_cpt_pf() argument
293 int cpt_pf_num = get_cpt_pf_num(rvu); in is_cpt_pf()
303 static bool is_cpt_vf(struct rvu *rvu, u16 pcifunc) in is_cpt_vf() argument
305 int cpt_pf_num = get_cpt_pf_num(rvu); in is_cpt_vf()
326 int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu, in rvu_mbox_handler_cpt_lf_alloc() argument
343 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_lf_alloc()
344 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in rvu_mbox_handler_cpt_lf_alloc()
354 if (!is_pffunc_map_valid(rvu, req->nix_pf_func, BLKTYPE_NIX)) in rvu_mbox_handler_cpt_lf_alloc()
363 if (!is_pffunc_map_valid(rvu, req->sso_pf_func, BLKTYPE_SSO)) in rvu_mbox_handler_cpt_lf_alloc()
368 cptlf = rvu_get_lf(rvu, block, pcifunc, slot); in rvu_mbox_handler_cpt_lf_alloc()
374 if (!is_rvu_otx2(rvu)) in rvu_mbox_handler_cpt_lf_alloc()
377 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
382 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in rvu_mbox_handler_cpt_lf_alloc()
386 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
392 static int cpt_lf_free(struct rvu *rvu, struct msg_req *req, int blkaddr) in cpt_lf_free() argument
398 block = &rvu->hw->block[blkaddr]; in cpt_lf_free()
399 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in cpt_lf_free()
405 cptlf = rvu_get_lf(rvu, block, pcifunc, slot); in cpt_lf_free()
410 rvu_cpt_lf_teardown(rvu, pcifunc, blkaddr, cptlf, slot); in cpt_lf_free()
413 err = rvu_lf_reset(rvu, block, cptlf); in cpt_lf_free()
415 dev_err(rvu->dev, "Failed to reset blkaddr %d LF%d\n", in cpt_lf_free()
423 int rvu_mbox_handler_cpt_lf_free(struct rvu *rvu, struct msg_req *req, in rvu_mbox_handler_cpt_lf_free() argument
428 ret = cpt_lf_free(rvu, req, BLKADDR_CPT0); in rvu_mbox_handler_cpt_lf_free()
432 if (is_block_implemented(rvu->hw, BLKADDR_CPT1)) in rvu_mbox_handler_cpt_lf_free()
433 ret = cpt_lf_free(rvu, req, BLKADDR_CPT1); in rvu_mbox_handler_cpt_lf_free()
438 static int cpt_inline_ipsec_cfg_inbound(struct rvu *rvu, int blkaddr, u8 cptlf, in cpt_inline_ipsec_cfg_inbound() argument
445 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_inbound()
454 if (sso_pf_func && !is_pffunc_map_valid(rvu, sso_pf_func, BLKTYPE_SSO)) in cpt_inline_ipsec_cfg_inbound()
465 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
469 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_inbound()
472 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
476 rvu_write64(rvu, blkaddr, CPT_AF_ECO, 0x1); in cpt_inline_ipsec_cfg_inbound()
481 if (!is_rvu_otx2(rvu)) { in cpt_inline_ipsec_cfg_inbound()
483 val |= (u64)rvu->hw->cpt_chan_base; in cpt_inline_ipsec_cfg_inbound()
485 rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0), val); in cpt_inline_ipsec_cfg_inbound()
486 rvu_write64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1), val); in cpt_inline_ipsec_cfg_inbound()
492 static int cpt_inline_ipsec_cfg_outbound(struct rvu *rvu, int blkaddr, u8 cptlf, in cpt_inline_ipsec_cfg_outbound() argument
500 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
510 if (nix_pf_func && !is_pffunc_map_valid(rvu, nix_pf_func, BLKTYPE_NIX)) in cpt_inline_ipsec_cfg_outbound()
518 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
522 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf)); in cpt_inline_ipsec_cfg_outbound()
524 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL2(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
526 nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, nix_pf_func); in cpt_inline_ipsec_cfg_outbound()
529 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
531 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
537 int rvu_mbox_handler_cpt_inline_ipsec_cfg(struct rvu *rvu, in rvu_mbox_handler_cpt_inline_ipsec_cfg() argument
546 blkaddr = rvu_get_blkaddr_from_slot(rvu, BLKTYPE_CPT, pcifunc, in rvu_mbox_handler_cpt_inline_ipsec_cfg()
551 block = &rvu->hw->block[blkaddr]; in rvu_mbox_handler_cpt_inline_ipsec_cfg()
553 cptlf = rvu_get_lf(rvu, block, pcifunc, actual_slot); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
559 ret = cpt_inline_ipsec_cfg_inbound(rvu, blkaddr, cptlf, req); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
563 ret = cpt_inline_ipsec_cfg_outbound(rvu, blkaddr, cptlf, req); in rvu_mbox_handler_cpt_inline_ipsec_cfg()
573 static bool is_valid_offset(struct rvu *rvu, struct cpt_rd_wr_reg_msg *req) in is_valid_offset() argument
591 block = &rvu->hw->block[blkaddr]; in is_valid_offset()
592 pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc); in is_valid_offset()
599 lf = rvu_get_lf(rvu, &rvu->hw->block[blkaddr], in is_valid_offset()
633 int rvu_mbox_handler_cpt_rd_wr_register(struct rvu *rvu, in rvu_mbox_handler_cpt_rd_wr_register() argument
644 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_rd_wr_register()
645 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_rd_wr_register()
652 if (!is_valid_offset(rvu, req)) in rvu_mbox_handler_cpt_rd_wr_register()
656 rvu_write64(rvu, blkaddr, req->reg_offset, req->val); in rvu_mbox_handler_cpt_rd_wr_register()
658 rsp->val = rvu_read64(rvu, blkaddr, req->reg_offset); in rvu_mbox_handler_cpt_rd_wr_register()
663 static void get_ctx_pc(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr) in get_ctx_pc() argument
665 if (is_rvu_otx2(rvu)) in get_ctx_pc()
668 rsp->ctx_mis_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_MIS_PC); in get_ctx_pc()
669 rsp->ctx_hit_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_HIT_PC); in get_ctx_pc()
670 rsp->ctx_aop_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_AOP_PC); in get_ctx_pc()
671 rsp->ctx_aop_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
673 rsp->ctx_ifetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_IFETCH_PC); in get_ctx_pc()
674 rsp->ctx_ifetch_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
676 rsp->ctx_ffetch_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
677 rsp->ctx_ffetch_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
679 rsp->ctx_wback_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
680 rsp->ctx_wback_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
682 rsp->ctx_psh_pc = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FFETCH_PC); in get_ctx_pc()
683 rsp->ctx_psh_lat_pc = rvu_read64(rvu, blkaddr, in get_ctx_pc()
685 rsp->ctx_err = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ERR); in get_ctx_pc()
686 rsp->ctx_enc_id = rvu_read64(rvu, blkaddr, CPT_AF_CTX_ENC_ID); in get_ctx_pc()
687 rsp->ctx_flush_timer = rvu_read64(rvu, blkaddr, CPT_AF_CTX_FLUSH_TIMER); in get_ctx_pc()
689 rsp->rxc_time = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME); in get_ctx_pc()
690 rsp->rxc_time_cfg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG); in get_ctx_pc()
691 rsp->rxc_active_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS); in get_ctx_pc()
692 rsp->rxc_zombie_sts = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS); in get_ctx_pc()
693 rsp->rxc_dfrg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_DFRG); in get_ctx_pc()
694 rsp->x2p_link_cfg0 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(0)); in get_ctx_pc()
695 rsp->x2p_link_cfg1 = rvu_read64(rvu, blkaddr, CPT_AF_X2PX_LINK_CFG(1)); in get_ctx_pc()
698 static void get_eng_sts(struct rvu *rvu, struct cpt_sts_rsp *rsp, int blkaddr) in get_eng_sts() argument
704 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS1); in get_eng_sts()
723 int rvu_mbox_handler_cpt_sts(struct rvu *rvu, struct cpt_sts_req *req, in rvu_mbox_handler_cpt_sts() argument
733 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_sts()
734 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_sts()
737 get_ctx_pc(rvu, rsp, blkaddr); in rvu_mbox_handler_cpt_sts()
740 get_eng_sts(rvu, rsp, blkaddr); in rvu_mbox_handler_cpt_sts()
743 rsp->inst_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_REQ_PC); in rvu_mbox_handler_cpt_sts()
744 rsp->inst_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_INST_LATENCY_PC); in rvu_mbox_handler_cpt_sts()
745 rsp->rd_req_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_REQ_PC); in rvu_mbox_handler_cpt_sts()
746 rsp->rd_lat_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_LATENCY_PC); in rvu_mbox_handler_cpt_sts()
747 rsp->rd_uc_pc = rvu_read64(rvu, blkaddr, CPT_AF_RD_UC_PC); in rvu_mbox_handler_cpt_sts()
748 rsp->active_cycles_pc = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_cpt_sts()
750 rsp->exe_err_info = rvu_read64(rvu, blkaddr, CPT_AF_EXE_ERR_INFO); in rvu_mbox_handler_cpt_sts()
751 rsp->cptclk_cnt = rvu_read64(rvu, blkaddr, CPT_AF_CPTCLK_CNT); in rvu_mbox_handler_cpt_sts()
752 rsp->diag = rvu_read64(rvu, blkaddr, CPT_AF_DIAG); in rvu_mbox_handler_cpt_sts()
764 static void cpt_rxc_time_cfg(struct rvu *rvu, struct cpt_rxc_time_cfg_req *req, in cpt_rxc_time_cfg() argument
774 rvu_write64(rvu, blkaddr, CPT_AF_RXC_TIME_CFG, req->step); in cpt_rxc_time_cfg()
775 rvu_write64(rvu, blkaddr, CPT_AF_RXC_DFRG, dfrg_reg); in cpt_rxc_time_cfg()
778 int rvu_mbox_handler_cpt_rxc_time_cfg(struct rvu *rvu, in rvu_mbox_handler_cpt_rxc_time_cfg() argument
789 if (!is_cpt_pf(rvu, req->hdr.pcifunc) && in rvu_mbox_handler_cpt_rxc_time_cfg()
790 !is_cpt_vf(rvu, req->hdr.pcifunc)) in rvu_mbox_handler_cpt_rxc_time_cfg()
793 cpt_rxc_time_cfg(rvu, req, blkaddr); in rvu_mbox_handler_cpt_rxc_time_cfg()
798 int rvu_mbox_handler_cpt_ctx_cache_sync(struct rvu *rvu, struct msg_req *req, in rvu_mbox_handler_cpt_ctx_cache_sync() argument
801 return rvu_cpt_ctx_flush(rvu, req->hdr.pcifunc); in rvu_mbox_handler_cpt_ctx_cache_sync()
804 static void cpt_rxc_teardown(struct rvu *rvu, int blkaddr) in cpt_rxc_teardown() argument
810 if (is_rvu_otx2(rvu)) in cpt_rxc_teardown()
822 cpt_rxc_time_cfg(rvu, &req, blkaddr); in cpt_rxc_teardown()
825 reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ACTIVE_STS); in cpt_rxc_teardown()
834 dev_warn(rvu->dev, "Poll for RXC active count hits hard loop counter\n"); in cpt_rxc_teardown()
838 reg = rvu_read64(rvu, blkaddr, CPT_AF_RXC_ZOMBIE_STS); in cpt_rxc_teardown()
847 dev_warn(rvu->dev, "Poll for RXC zombie count hits hard loop counter\n"); in cpt_rxc_teardown()
855 static void cpt_lf_disable_iqueue(struct rvu *rvu, int blkaddr, int slot) in cpt_lf_disable_iqueue() argument
862 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_CTL), 0x0); in cpt_lf_disable_iqueue()
865 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
868 rvu_write64(rvu, blkaddr, in cpt_lf_disable_iqueue()
873 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
882 grp_ptr = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
891 dev_warn(rvu->dev, "CPT FLR hits hard loop counter\n"); in cpt_lf_disable_iqueue()
896 inprog = rvu_read64(rvu, blkaddr, in cpt_lf_disable_iqueue()
911 dev_warn(rvu->dev, "CPT FLR hits hard loop counter\n"); in cpt_lf_disable_iqueue()
914 int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf, int slot) in rvu_cpt_lf_teardown() argument
918 if (is_cpt_pf(rvu, pcifunc) || is_cpt_vf(rvu, pcifunc)) in rvu_cpt_lf_teardown()
919 cpt_rxc_teardown(rvu, blkaddr); in rvu_cpt_lf_teardown()
923 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg); in rvu_cpt_lf_teardown()
925 cpt_lf_disable_iqueue(rvu, blkaddr, slot); in rvu_cpt_lf_teardown()
928 reg = rvu_read64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG)); in rvu_cpt_lf_teardown()
930 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_ALIASX(slot, CPT_LF_INPROG), reg); in rvu_cpt_lf_teardown()
932 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0); in rvu_cpt_lf_teardown()
940 static int cpt_inline_inb_lf_cmd_send(struct rvu *rvu, int blkaddr, in cpt_inline_inb_lf_cmd_send() argument
943 int cpt_pf_num = get_cpt_pf_num(rvu); in cpt_inline_inb_lf_cmd_send()
956 res_daddr = dma_map_single(rvu->dev, res, CPT_RES_LEN, in cpt_inline_inb_lf_cmd_send()
958 if (dma_mapping_error(rvu->dev, res_daddr)) { in cpt_inline_inb_lf_cmd_send()
959 dev_err(rvu->dev, "DMA mapping failed for CPT result\n"); in cpt_inline_inb_lf_cmd_send()
967 otx2_mbox_alloc_msg_rsp(&rvu->afpf_wq_info.mbox_up, in cpt_inline_inb_lf_cmd_send()
995 rvu_write64(rvu, nix_blkaddr, NIX_AF_RX_CPTX_CREDIT(cpt_idx), in cpt_inline_inb_lf_cmd_send()
998 otx2_mbox_msg_send(&rvu->afpf_wq_info.mbox_up, cpt_pf_num); in cpt_inline_inb_lf_cmd_send()
999 rc = otx2_mbox_wait_for_rsp(&rvu->afpf_wq_info.mbox_up, cpt_pf_num); in cpt_inline_inb_lf_cmd_send()
1001 dev_warn(rvu->dev, "notification to pf %d failed\n", in cpt_inline_inb_lf_cmd_send()
1013 dev_warn(rvu->dev, "Poll for result hits hard loop counter\n"); in cpt_inline_inb_lf_cmd_send()
1016 dma_unmap_single(rvu->dev, res_daddr, CPT_RES_LEN, DMA_BIDIRECTIONAL); in cpt_inline_inb_lf_cmd_send()
1026 int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc) in rvu_cpt_ctx_flush() argument
1034 nix_blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc); in rvu_cpt_ctx_flush()
1038 if (is_rvu_otx2(rvu)) in rvu_cpt_ctx_flush()
1046 rc = cpt_inline_inb_lf_cmd_send(rvu, blkaddr, nix_blkaddr); in rvu_cpt_ctx_flush()
1051 cpt_rxc_teardown(rvu, blkaddr); in rvu_cpt_ctx_flush()
1053 reg = rvu_read64(rvu, blkaddr, CPT_AF_CONSTANTS0); in rvu_cpt_ctx_flush()
1056 mutex_lock(&rvu->rsrc_lock); in rvu_cpt_ctx_flush()
1058 num_lfs = rvu_get_rsrc_mapcount(rvu_get_pfvf(rvu, pcifunc), in rvu_cpt_ctx_flush()
1061 dev_warn(rvu->dev, "CPT LF is not configured\n"); in rvu_cpt_ctx_flush()
1067 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, reg); in rvu_cpt_ctx_flush()
1070 cam_data = rvu_read64(rvu, blkaddr, CPT_AF_CTX_CAM_DATA(i)); in rvu_cpt_ctx_flush()
1075 rvu_write64(rvu, blkaddr, in rvu_cpt_ctx_flush()
1080 rvu_write64(rvu, blkaddr, CPT_AF_BAR2_SEL, 0); in rvu_cpt_ctx_flush()
1083 mutex_unlock(&rvu->rsrc_lock); in rvu_cpt_ctx_flush()