198 	val = hinic_hwif_read_reg(eq->hwif, addr);  in eq_update_ci()
211 	hinic_hwif_write_reg(eq->hwif, addr, val);  in eq_update_ci()
221 	struct hinic_hwif *hwif = aeqs->hwif;  in aeq_irq_handler()  local
222 	struct pci_dev *pdev = hwif->pdev;  in aeq_irq_handler()
284 	struct hinic_hwif *hwif = ceqs->hwif;  in ceq_event_handler()  local
285 	struct pci_dev *pdev = hwif->pdev;  in ceq_event_handler()
393 	hinic_msix_attr_cnt_clear(aeq->hwif, aeq->msix_entry.entry);  in aeq_interrupt()
414 	hinic_msix_attr_cnt_clear(ceq->hwif, ceq->msix_entry.entry);  in ceq_interrupt()
431 		val = hinic_hwif_read_reg(eq->hwif, addr);  in get_ctrl0_val()
440 			HINIC_AEQ_CTRL_0_SET(HINIC_HWIF_PCI_INTF(eq->hwif),  in get_ctrl0_val()
449 		val = hinic_hwif_read_reg(eq->hwif, addr);  in get_ctrl0_val()
460 			HINIC_CEQ_CTRL_0_SET(HINIC_HWIF_PCI_INTF(eq->hwif),  in get_ctrl0_val()
480 	hinic_hwif_write_reg(eq->hwif, addr, val);  in set_ctrl0()
495 		val = hinic_hwif_read_reg(eq->hwif, addr);  in get_ctrl1_val()
512 		val = hinic_hwif_read_reg(eq->hwif, addr);  in get_ctrl1_val()
536 	hinic_hwif_write_reg(eq->hwif, addr, val);  in set_ctrl1()
556 	ceq_ctrl.func_id = HINIC_HWIF_FUNC_IDX(hwdev->hwif);  in set_ceq_ctrl_reg()
564 		dev_err(&hwdev->hwif->pdev->dev,  in set_ceq_ctrl_reg()
579 	if (HINIC_IS_VF(eq->hwif) && eq->type == HINIC_CEQ)  in set_eq_ctrls()
631 	struct hinic_hwif *hwif = eq->hwif;  in alloc_eq_pages()  local
632 	struct pci_dev *pdev = hwif->pdev;  in alloc_eq_pages()
661 		hinic_hwif_write_reg(hwif, addr, val);  in alloc_eq_pages()
666 		hinic_hwif_write_reg(hwif, addr, val);  in alloc_eq_pages()
697 	struct hinic_hwif *hwif = eq->hwif;  in free_eq_pages()  local
698 	struct pci_dev *pdev = hwif->pdev;  in free_eq_pages()
722 static int init_eq(struct hinic_eq *eq, struct hinic_hwif *hwif,  in init_eq()  argument
726 	struct pci_dev *pdev = hwif->pdev;  in init_eq()
729 	eq->hwif = hwif;  in init_eq()
736 	hinic_hwif_write_reg(eq->hwif, EQ_CONS_IDX_REG_ADDR(eq), 0);  in init_eq()
737 	hinic_hwif_write_reg(eq->hwif, EQ_PROD_IDX_REG_ADDR(eq), 0);  in init_eq()
789 	hinic_msix_attr_set(eq->hwif, eq->msix_entry.entry,  in init_eq()
824 	hinic_set_msix_state(eq->hwif, eq->msix_entry.entry,  in remove_eq()
833 		hinic_hwif_write_reg(eq->hwif,  in remove_eq()
838 		hinic_hwif_write_reg(eq->hwif,  in remove_eq()
843 	eq->cons_idx = hinic_hwif_read_reg(eq->hwif, EQ_PROD_IDX_REG_ADDR(eq));  in remove_eq()
860 int hinic_aeqs_init(struct hinic_aeqs *aeqs, struct hinic_hwif *hwif,  in hinic_aeqs_init()  argument
864 	struct pci_dev *pdev = hwif->pdev;  in hinic_aeqs_init()
871 	aeqs->hwif = hwif;  in hinic_aeqs_init()
875 		err = init_eq(&aeqs->aeq[q_id], hwif, HINIC_AEQ, q_id, q_len,  in hinic_aeqs_init()
918 int hinic_ceqs_init(struct hinic_ceqs *ceqs, struct hinic_hwif *hwif,  in hinic_ceqs_init()  argument
922 	struct pci_dev *pdev = hwif->pdev;  in hinic_ceqs_init()
925 	ceqs->hwif = hwif;  in hinic_ceqs_init()
930 		err = init_eq(&ceqs->ceq[q_id], hwif, HINIC_CEQ, q_id, q_len,  in hinic_ceqs_init()
968 		ci = hinic_hwif_read_reg(hwdev->hwif, addr);  in hinic_dump_ceq_info()
970 		pi = hinic_hwif_read_reg(hwdev->hwif, addr);  in hinic_dump_ceq_info()
971 …dev_err(&hwdev->hwif->pdev->dev, "Ceq id: %d, ci: 0x%08x, sw_ci: 0x%08x, pi: 0x%x, tasklet_state: …  in hinic_dump_ceq_info()
988 		ci = hinic_hwif_read_reg(hwdev->hwif, addr);  in hinic_dump_aeq_info()
990 		pi = hinic_hwif_read_reg(hwdev->hwif, addr);  in hinic_dump_aeq_info()
992 …dev_err(&hwdev->hwif->pdev->dev, "Aeq id: %d, ci: 0x%08x, pi: 0x%x, work_state: 0x%x, wrap: %d, de…  in hinic_dump_aeq_info()