138 static void hclge_pfc_stats_get(struct hclge_dev *hdev, bool tx, u64 *stats)  in hclge_pfc_stats_get()  argument
149 		stats[i] = HCLGE_STATS_READ(&hdev->mac_stats, offset[i]);  in hclge_pfc_stats_get()
152 void hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats)  in hclge_pfc_rx_stats_get()  argument
154 	hclge_pfc_stats_get(hdev, false, stats);  in hclge_pfc_rx_stats_get()
157 void hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats)  in hclge_pfc_tx_stats_get()  argument
159 	hclge_pfc_stats_get(hdev, true, stats);  in hclge_pfc_tx_stats_get()
162 int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)  in hclge_mac_pause_en_cfg()  argument
171 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_mac_pause_en_cfg()
174 static int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,  in hclge_pfc_pause_en_cfg()  argument
185 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_pfc_pause_en_cfg()
188 static int hclge_pause_param_cfg(struct hclge_dev *hdev, const u8 *addr,  in hclge_pause_param_cfg()  argument
203 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_pause_param_cfg()
206 int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr)  in hclge_pause_addr_cfg()  argument
218 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_pause_addr_cfg()
225 	return hclge_pause_param_cfg(hdev, mac_addr, trans_gap, trans_time);  in hclge_pause_addr_cfg()
228 static int hclge_fill_pri_array(struct hclge_dev *hdev, u8 *pri, u8 pri_id)  in hclge_fill_pri_array()  argument
232 	tc = hdev->tm_info.prio_tc[pri_id];  in hclge_fill_pri_array()
234 	if (tc >= hdev->tm_info.num_tc)  in hclge_fill_pri_array()
251 int hclge_up_to_tc_map(struct hclge_dev *hdev)  in hclge_up_to_tc_map()  argument
261 		ret = hclge_fill_pri_array(hdev, pri, pri_id);  in hclge_up_to_tc_map()
266 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_up_to_tc_map()
269 static void hclge_dscp_to_prio_map_init(struct hclge_dev *hdev)  in hclge_dscp_to_prio_map_init()  argument
273 	hdev->vport[0].nic.kinfo.tc_map_mode = HNAE3_TC_MAP_MODE_PRIO;  in hclge_dscp_to_prio_map_init()
274 	hdev->vport[0].nic.kinfo.dscp_app_cnt = 0;  in hclge_dscp_to_prio_map_init()
276 		hdev->vport[0].nic.kinfo.dscp_prio[i] = HNAE3_PRIO_ID_INVALID;  in hclge_dscp_to_prio_map_init()
279 int hclge_dscp_to_tc_map(struct hclge_dev *hdev)  in hclge_dscp_to_tc_map()  argument
292 		pri_id = hdev->vport[0].nic.kinfo.dscp_prio[i];  in hclge_dscp_to_tc_map()
294 		tc_id = hdev->tm_info.prio_tc[pri_id];  in hclge_dscp_to_tc_map()
301 		pri_id = hdev->vport[0].nic.kinfo.dscp_prio[j];  in hclge_dscp_to_tc_map()
303 		tc_id = hdev->tm_info.prio_tc[pri_id];  in hclge_dscp_to_tc_map()
307 	return hclge_cmd_send(&hdev->hw, desc, HCLGE_DSCP_MAP_TC_BD_NUM);  in hclge_dscp_to_tc_map()
310 static int hclge_tm_pg_to_pri_map_cfg(struct hclge_dev *hdev,  in hclge_tm_pg_to_pri_map_cfg()  argument
323 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pg_to_pri_map_cfg()
326 static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev, u16 qs_id, u8 pri,  in hclge_tm_qs_to_pri_map_cfg()  argument
340 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_qs_to_pri_map_cfg()
343 static int hclge_tm_q_to_qs_map_cfg(struct hclge_dev *hdev,  in hclge_tm_q_to_qs_map_cfg()  argument
374 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_q_to_qs_map_cfg()
377 static int hclge_tm_pg_weight_cfg(struct hclge_dev *hdev, u8 pg_id,  in hclge_tm_pg_weight_cfg()  argument
390 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pg_weight_cfg()
393 static int hclge_tm_pri_weight_cfg(struct hclge_dev *hdev, u8 pri_id,  in hclge_tm_pri_weight_cfg()  argument
406 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pri_weight_cfg()
409 static int hclge_tm_qs_weight_cfg(struct hclge_dev *hdev, u16 qs_id,  in hclge_tm_qs_weight_cfg()  argument
422 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_qs_weight_cfg()
439 static int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev,  in hclge_tm_pg_shapping_cfg()  argument
461 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pg_shapping_cfg()
464 int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_port_shaper_cfg()  argument
472 	ret = hclge_shaper_para_calc(hdev->hw.mac.speed, HCLGE_SHAPER_LVL_PORT,  in hclge_tm_port_shaper_cfg()
474 				     hdev->ae_dev->dev_specs.max_tm_rate);  in hclge_tm_port_shaper_cfg()
490 	shap_cfg_cmd->port_rate = cpu_to_le32(hdev->hw.mac.speed);  in hclge_tm_port_shaper_cfg()
492 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_port_shaper_cfg()
495 static int hclge_tm_pri_shapping_cfg(struct hclge_dev *hdev,  in hclge_tm_pri_shapping_cfg()  argument
518 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pri_shapping_cfg()
521 static int hclge_tm_pg_schd_mode_cfg(struct hclge_dev *hdev, u8 pg_id)  in hclge_tm_pg_schd_mode_cfg()  argument
527 	if (hdev->tm_info.pg_info[pg_id].pg_sch_mode == HCLGE_SCH_MODE_DWRR)  in hclge_tm_pg_schd_mode_cfg()
534 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pg_schd_mode_cfg()
537 static int hclge_tm_pri_schd_mode_cfg(struct hclge_dev *hdev, u8 pri_id)  in hclge_tm_pri_schd_mode_cfg()  argument
543 	if (hdev->tm_info.tc_info[pri_id].tc_sch_mode == HCLGE_SCH_MODE_DWRR)  in hclge_tm_pri_schd_mode_cfg()
550 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_pri_schd_mode_cfg()
553 static int hclge_tm_qs_schd_mode_cfg(struct hclge_dev *hdev, u16 qs_id, u8 mode)  in hclge_tm_qs_schd_mode_cfg()  argument
566 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_qs_schd_mode_cfg()
569 static int hclge_tm_qs_bp_cfg(struct hclge_dev *hdev, u8 tc, u8 grp_id,  in hclge_tm_qs_bp_cfg()  argument
584 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_qs_bp_cfg()
592 	struct hclge_dev *hdev = vport->back;  in hclge_tm_qs_shaper_cfg()  local
598 		max_tx_rate = hdev->ae_dev->dev_specs.max_tm_rate;  in hclge_tm_qs_shaper_cfg()
602 				     hdev->ae_dev->dev_specs.max_tm_rate);  in hclge_tm_qs_shaper_cfg()
622 		ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_qs_shaper_cfg()
624 			dev_err(&hdev->pdev->dev,  in hclge_tm_qs_shaper_cfg()
639 	struct hclge_dev *hdev = vport->back;  in hclge_vport_get_max_rss_size()  local
647 		if (!(hdev->hw_tc_map & BIT(i)) || i >= tc_info->num_tc)  in hclge_vport_get_max_rss_size()
660 	struct hclge_dev *hdev = vport->back;  in hclge_vport_get_tqp_num()  local
668 		if (hdev->hw_tc_map & BIT(i) && i < tc_info->num_tc)  in hclge_vport_get_tqp_num()
678 	struct hclge_dev *hdev = vport->back;  in hclge_tm_update_kinfo_rss_size()  local
690 		vport_max_rss_size = hdev->vf_rss_size_max;  in hclge_tm_update_kinfo_rss_size()
692 		kinfo->tc_info.max_tc = hdev->tc_max;  in hclge_tm_update_kinfo_rss_size()
694 			min_t(u16, vport->alloc_tqps, hdev->tm_info.num_tc);  in hclge_tm_update_kinfo_rss_size()
696 		vport_max_rss_size = hdev->pf_rss_size_max;  in hclge_tm_update_kinfo_rss_size()
705 		dev_info(&hdev->pdev->dev, "rss changes from %u to %u\n",  in hclge_tm_update_kinfo_rss_size()
718 	struct hclge_dev *hdev = vport->back;  in hclge_tm_vport_tc_info_update()  local
724 	vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit;  in hclge_tm_vport_tc_info_update()
727 		hdev->rss_cfg.rss_size = kinfo->rss_size;  in hclge_tm_vport_tc_info_update()
734 		if (hdev->hw_tc_map & BIT(i) && i < kinfo->tc_info.num_tc) {  in hclge_tm_vport_tc_info_update()
744 	memcpy(kinfo->tc_info.prio_tc, hdev->tm_info.prio_tc,  in hclge_tm_vport_tc_info_update()
748 static void hclge_tm_vport_info_update(struct hclge_dev *hdev)  in hclge_tm_vport_info_update()  argument
750 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_vport_info_update()
753 	for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_vport_info_update()
760 static void hclge_tm_tc_info_init(struct hclge_dev *hdev)  in hclge_tm_tc_info_init()  argument
765 	for (i = 0; i < hdev->tc_max; i++) {  in hclge_tm_tc_info_init()
766 		if (i < hdev->tm_info.num_tc) {  in hclge_tm_tc_info_init()
768 			bw_limit = hdev->tm_info.pg_info[0].bw_limit;  in hclge_tm_tc_info_init()
774 		hdev->tm_info.tc_info[i].tc_id = i;  in hclge_tm_tc_info_init()
775 		hdev->tm_info.tc_info[i].tc_sch_mode = tc_sch_mode;  in hclge_tm_tc_info_init()
776 		hdev->tm_info.tc_info[i].pgid = 0;  in hclge_tm_tc_info_init()
777 		hdev->tm_info.tc_info[i].bw_limit = bw_limit;  in hclge_tm_tc_info_init()
781 		hdev->tm_info.prio_tc[i] =  in hclge_tm_tc_info_init()
782 			(i >= hdev->tm_info.num_tc) ? 0 : i;  in hclge_tm_tc_info_init()
785 static void hclge_tm_pg_info_init(struct hclge_dev *hdev)  in hclge_tm_pg_info_init()  argument
791 	for (i = 0; i < hdev->tm_info.num_pg; i++) {  in hclge_tm_pg_info_init()
794 		hdev->tm_info.pg_dwrr[i] = i ? 0 : BW_PERCENT;  in hclge_tm_pg_info_init()
796 		hdev->tm_info.pg_info[i].pg_id = i;  in hclge_tm_pg_info_init()
797 		hdev->tm_info.pg_info[i].pg_sch_mode = HCLGE_SCH_MODE_DWRR;  in hclge_tm_pg_info_init()
799 		hdev->tm_info.pg_info[i].bw_limit =  in hclge_tm_pg_info_init()
800 					hdev->ae_dev->dev_specs.max_tm_rate;  in hclge_tm_pg_info_init()
805 		hdev->tm_info.pg_info[i].tc_bit_map = hdev->hw_tc_map;  in hclge_tm_pg_info_init()
806 		for (k = 0; k < hdev->tm_info.num_tc; k++)  in hclge_tm_pg_info_init()
807 			hdev->tm_info.pg_info[i].tc_dwrr[k] = BW_PERCENT;  in hclge_tm_pg_info_init()
809 			hdev->tm_info.pg_info[i].tc_dwrr[k] = 0;  in hclge_tm_pg_info_init()
813 static void hclge_update_fc_mode_by_dcb_flag(struct hclge_dev *hdev)  in hclge_update_fc_mode_by_dcb_flag()  argument
815 	if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en) {  in hclge_update_fc_mode_by_dcb_flag()
816 		if (hdev->fc_mode_last_time == HCLGE_FC_PFC)  in hclge_update_fc_mode_by_dcb_flag()
817 			dev_warn(&hdev->pdev->dev,  in hclge_update_fc_mode_by_dcb_flag()
820 		hdev->tm_info.fc_mode = hdev->fc_mode_last_time;  in hclge_update_fc_mode_by_dcb_flag()
821 	} else if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) {  in hclge_update_fc_mode_by_dcb_flag()
826 		hdev->fc_mode_last_time = hdev->tm_info.fc_mode;  in hclge_update_fc_mode_by_dcb_flag()
827 		hdev->tm_info.fc_mode = HCLGE_FC_PFC;  in hclge_update_fc_mode_by_dcb_flag()
831 static void hclge_update_fc_mode(struct hclge_dev *hdev)  in hclge_update_fc_mode()  argument
833 	if (!hdev->tm_info.pfc_en) {  in hclge_update_fc_mode()
834 		hdev->tm_info.fc_mode = hdev->fc_mode_last_time;  in hclge_update_fc_mode()
838 	if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) {  in hclge_update_fc_mode()
839 		hdev->fc_mode_last_time = hdev->tm_info.fc_mode;  in hclge_update_fc_mode()
840 		hdev->tm_info.fc_mode = HCLGE_FC_PFC;  in hclge_update_fc_mode()
844 void hclge_tm_pfc_info_update(struct hclge_dev *hdev)  in hclge_tm_pfc_info_update()  argument
846 	if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)  in hclge_tm_pfc_info_update()
847 		hclge_update_fc_mode(hdev);  in hclge_tm_pfc_info_update()
849 		hclge_update_fc_mode_by_dcb_flag(hdev);  in hclge_tm_pfc_info_update()
852 static void hclge_tm_schd_info_init(struct hclge_dev *hdev)  in hclge_tm_schd_info_init()  argument
854 	hclge_tm_pg_info_init(hdev);  in hclge_tm_schd_info_init()
856 	hclge_tm_tc_info_init(hdev);  in hclge_tm_schd_info_init()
858 	hclge_tm_vport_info_update(hdev);  in hclge_tm_schd_info_init()
860 	hclge_tm_pfc_info_update(hdev);  in hclge_tm_schd_info_init()
863 static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev)  in hclge_tm_pg_to_pri_map()  argument
868 	if (hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE)  in hclge_tm_pg_to_pri_map()
871 	for (i = 0; i < hdev->tm_info.num_pg; i++) {  in hclge_tm_pg_to_pri_map()
874 			hdev, i, hdev->tm_info.pg_info[i].tc_bit_map);  in hclge_tm_pg_to_pri_map()
882 static int hclge_tm_pg_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_pg_shaper_cfg()  argument
884 	u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate;  in hclge_tm_pg_shaper_cfg()
891 	if (hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE)  in hclge_tm_pg_shaper_cfg()
895 	for (i = 0; i < hdev->tm_info.num_pg; i++) {  in hclge_tm_pg_shaper_cfg()
896 		u32 rate = hdev->tm_info.pg_info[i].bw_limit;  in hclge_tm_pg_shaper_cfg()
907 		ret = hclge_tm_pg_shapping_cfg(hdev,  in hclge_tm_pg_shaper_cfg()
918 		ret = hclge_tm_pg_shapping_cfg(hdev,  in hclge_tm_pg_shaper_cfg()
928 static int hclge_tm_pg_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_pg_dwrr_cfg()  argument
934 	if (hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE)  in hclge_tm_pg_dwrr_cfg()
938 	for (i = 0; i < hdev->tm_info.num_pg; i++) {  in hclge_tm_pg_dwrr_cfg()
940 		ret = hclge_tm_pg_weight_cfg(hdev, i, hdev->tm_info.pg_dwrr[i]);  in hclge_tm_pg_dwrr_cfg()
948 static int hclge_vport_q_to_qs_map(struct hclge_dev *hdev,  in hclge_vport_q_to_qs_map()  argument
961 			ret = hclge_tm_q_to_qs_map_cfg(hdev,  in hclge_vport_q_to_qs_map()
972 static int hclge_tm_pri_q_qs_cfg_tc_base(struct hclge_dev *hdev)  in hclge_tm_pri_q_qs_cfg_tc_base()  argument
974 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_q_qs_cfg_tc_base()
979 	for (k = 0; k < hdev->num_alloc_vport; k++) {  in hclge_tm_pri_q_qs_cfg_tc_base()
986 			ret = hclge_tm_qs_to_pri_map_cfg(hdev,  in hclge_tm_pri_q_qs_cfg_tc_base()
997 static int hclge_tm_pri_q_qs_cfg_vnet_base(struct hclge_dev *hdev)  in hclge_tm_pri_q_qs_cfg_vnet_base()  argument
999 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_q_qs_cfg_vnet_base()
1004 	for (k = 0; k < hdev->num_alloc_vport; k++)  in hclge_tm_pri_q_qs_cfg_vnet_base()
1006 			ret = hclge_tm_qs_to_pri_map_cfg(hdev,  in hclge_tm_pri_q_qs_cfg_vnet_base()
1016 static int hclge_tm_pri_q_qs_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_q_qs_cfg()  argument
1018 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_q_qs_cfg()
1022 	if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE)  in hclge_tm_pri_q_qs_cfg()
1023 		ret = hclge_tm_pri_q_qs_cfg_tc_base(hdev);  in hclge_tm_pri_q_qs_cfg()
1024 	else if (hdev->tx_sch_mode == HCLGE_FLAG_VNET_BASE_SCH_MODE)  in hclge_tm_pri_q_qs_cfg()
1025 		ret = hclge_tm_pri_q_qs_cfg_vnet_base(hdev);  in hclge_tm_pri_q_qs_cfg()
1033 	for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_pri_q_qs_cfg()
1034 		ret = hclge_vport_q_to_qs_map(hdev, vport);  in hclge_tm_pri_q_qs_cfg()
1044 static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_tc_base_shaper_cfg()  argument
1046 	u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate;  in hclge_tm_pri_tc_base_shaper_cfg()
1052 	for (i = 0; i < hdev->tc_max; i++) {  in hclge_tm_pri_tc_base_shaper_cfg()
1053 		u32 rate = hdev->tm_info.tc_info[i].bw_limit;  in hclge_tm_pri_tc_base_shaper_cfg()
1074 		ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_C_BUCKET, i,  in hclge_tm_pri_tc_base_shaper_cfg()
1079 		ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_P_BUCKET, i,  in hclge_tm_pri_tc_base_shaper_cfg()
1090 	struct hclge_dev *hdev = vport->back;  in hclge_tm_pri_vnet_base_shaper_pri_cfg()  local
1097 				     hdev->ae_dev->dev_specs.max_tm_rate);  in hclge_tm_pri_vnet_base_shaper_pri_cfg()
1104 	ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_C_BUCKET,  in hclge_tm_pri_vnet_base_shaper_pri_cfg()
1114 	ret = hclge_tm_pri_shapping_cfg(hdev, HCLGE_TM_SHAP_P_BUCKET,  in hclge_tm_pri_vnet_base_shaper_pri_cfg()
1126 	struct hclge_dev *hdev = vport->back;  in hclge_tm_pri_vnet_base_shaper_qs_cfg()  local
1127 	u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate;  in hclge_tm_pri_vnet_base_shaper_qs_cfg()
1133 		ret = hclge_shaper_para_calc(hdev->tm_info.tc_info[i].bw_limit,  in hclge_tm_pri_vnet_base_shaper_qs_cfg()
1143 static int hclge_tm_pri_vnet_base_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_vnet_base_shaper_cfg()  argument
1145 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_vnet_base_shaper_cfg()
1150 	for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_pri_vnet_base_shaper_cfg()
1165 static int hclge_tm_pri_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_shaper_cfg()  argument
1169 	if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE) {  in hclge_tm_pri_shaper_cfg()
1170 		ret = hclge_tm_pri_tc_base_shaper_cfg(hdev);  in hclge_tm_pri_shaper_cfg()
1174 		ret = hclge_tm_pri_vnet_base_shaper_cfg(hdev);  in hclge_tm_pri_shaper_cfg()
1182 static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_tc_base_dwrr_cfg()  argument
1184 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_tc_base_dwrr_cfg()
1190 	for (i = 0; i < hdev->tc_max; i++) {  in hclge_tm_pri_tc_base_dwrr_cfg()
1192 			&hdev->tm_info.pg_info[hdev->tm_info.tc_info[i].pgid];  in hclge_tm_pri_tc_base_dwrr_cfg()
1195 		ret = hclge_tm_pri_weight_cfg(hdev, i, dwrr);  in hclge_tm_pri_tc_base_dwrr_cfg()
1199 		for (k = 0; k < hdev->num_alloc_vport; k++) {  in hclge_tm_pri_tc_base_dwrr_cfg()
1207 				hdev, vport[k].qs_offset + i,  in hclge_tm_pri_tc_base_dwrr_cfg()
1217 static int hclge_tm_ets_tc_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_ets_tc_dwrr_cfg()  argument
1231 		pg_info = &hdev->tm_info.pg_info[hdev->tm_info.tc_info[i].pgid];  in hclge_tm_ets_tc_dwrr_cfg()
1237 	return hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_ets_tc_dwrr_cfg()
1243 	struct hclge_dev *hdev = vport->back;  in hclge_tm_pri_vnet_base_dwrr_pri_cfg()  local
1248 	ret = hclge_tm_pri_weight_cfg(hdev, vport->vport_id, vport->dwrr);  in hclge_tm_pri_vnet_base_dwrr_pri_cfg()
1255 			hdev, vport->qs_offset + i,  in hclge_tm_pri_vnet_base_dwrr_pri_cfg()
1256 			hdev->tm_info.pg_info[0].tc_dwrr[i]);  in hclge_tm_pri_vnet_base_dwrr_pri_cfg()
1264 static int hclge_tm_pri_vnet_base_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_vnet_base_dwrr_cfg()  argument
1266 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_pri_vnet_base_dwrr_cfg()
1270 	for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_pri_vnet_base_dwrr_cfg()
1281 static int hclge_tm_pri_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_pri_dwrr_cfg()  argument
1285 	if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE) {  in hclge_tm_pri_dwrr_cfg()
1286 		ret = hclge_tm_pri_tc_base_dwrr_cfg(hdev);  in hclge_tm_pri_dwrr_cfg()
1290 		if (!hnae3_dev_dcb_supported(hdev))  in hclge_tm_pri_dwrr_cfg()
1293 		ret = hclge_tm_ets_tc_dwrr_cfg(hdev);  in hclge_tm_pri_dwrr_cfg()
1295 			dev_warn(&hdev->pdev->dev,  in hclge_tm_pri_dwrr_cfg()
1297 				 hdev->fw_version);  in hclge_tm_pri_dwrr_cfg()
1303 		ret = hclge_tm_pri_vnet_base_dwrr_cfg(hdev);  in hclge_tm_pri_dwrr_cfg()
1311 static int hclge_tm_map_cfg(struct hclge_dev *hdev)  in hclge_tm_map_cfg()  argument
1315 	ret = hclge_up_to_tc_map(hdev);  in hclge_tm_map_cfg()
1319 	if (hdev->vport[0].nic.kinfo.tc_map_mode == HNAE3_TC_MAP_MODE_DSCP) {  in hclge_tm_map_cfg()
1320 		ret = hclge_dscp_to_tc_map(hdev);  in hclge_tm_map_cfg()
1325 	ret = hclge_tm_pg_to_pri_map(hdev);  in hclge_tm_map_cfg()
1329 	return hclge_tm_pri_q_qs_cfg(hdev);  in hclge_tm_map_cfg()
1332 static int hclge_tm_shaper_cfg(struct hclge_dev *hdev)  in hclge_tm_shaper_cfg()  argument
1336 	ret = hclge_tm_port_shaper_cfg(hdev);  in hclge_tm_shaper_cfg()
1340 	ret = hclge_tm_pg_shaper_cfg(hdev);  in hclge_tm_shaper_cfg()
1344 	return hclge_tm_pri_shaper_cfg(hdev);  in hclge_tm_shaper_cfg()
1347 int hclge_tm_dwrr_cfg(struct hclge_dev *hdev)  in hclge_tm_dwrr_cfg()  argument
1351 	ret = hclge_tm_pg_dwrr_cfg(hdev);  in hclge_tm_dwrr_cfg()
1355 	return hclge_tm_pri_dwrr_cfg(hdev);  in hclge_tm_dwrr_cfg()
1358 static int hclge_tm_lvl2_schd_mode_cfg(struct hclge_dev *hdev)  in hclge_tm_lvl2_schd_mode_cfg()  argument
1364 	if (hdev->tx_sch_mode == HCLGE_FLAG_VNET_BASE_SCH_MODE)  in hclge_tm_lvl2_schd_mode_cfg()
1367 	for (i = 0; i < hdev->tm_info.num_pg; i++) {  in hclge_tm_lvl2_schd_mode_cfg()
1368 		ret = hclge_tm_pg_schd_mode_cfg(hdev, i);  in hclge_tm_lvl2_schd_mode_cfg()
1376 static int hclge_tm_schd_mode_tc_base_cfg(struct hclge_dev *hdev, u8 pri_id)  in hclge_tm_schd_mode_tc_base_cfg()  argument
1378 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_schd_mode_tc_base_cfg()
1383 	ret = hclge_tm_pri_schd_mode_cfg(hdev, pri_id);  in hclge_tm_schd_mode_tc_base_cfg()
1387 	for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_schd_mode_tc_base_cfg()
1395 		ret = hclge_tm_qs_schd_mode_cfg(hdev,  in hclge_tm_schd_mode_tc_base_cfg()
1408 	struct hclge_dev *hdev = vport->back;  in hclge_tm_schd_mode_vnet_base_cfg()  local
1415 	ret = hclge_tm_pri_schd_mode_cfg(hdev, vport->vport_id);  in hclge_tm_schd_mode_vnet_base_cfg()
1420 		u8 sch_mode = hdev->tm_info.tc_info[i].tc_sch_mode;  in hclge_tm_schd_mode_vnet_base_cfg()
1422 		ret = hclge_tm_qs_schd_mode_cfg(hdev, vport->qs_offset + i,  in hclge_tm_schd_mode_vnet_base_cfg()
1431 static int hclge_tm_lvl34_schd_mode_cfg(struct hclge_dev *hdev)  in hclge_tm_lvl34_schd_mode_cfg()  argument
1433 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_lvl34_schd_mode_cfg()
1437 	if (hdev->tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE) {  in hclge_tm_lvl34_schd_mode_cfg()
1438 		for (i = 0; i < hdev->tc_max; i++) {  in hclge_tm_lvl34_schd_mode_cfg()
1439 			ret = hclge_tm_schd_mode_tc_base_cfg(hdev, i);  in hclge_tm_lvl34_schd_mode_cfg()
1444 		for (i = 0; i < hdev->num_alloc_vport; i++) {  in hclge_tm_lvl34_schd_mode_cfg()
1456 static int hclge_tm_schd_mode_hw(struct hclge_dev *hdev)  in hclge_tm_schd_mode_hw()  argument
1460 	ret = hclge_tm_lvl2_schd_mode_cfg(hdev);  in hclge_tm_schd_mode_hw()
1464 	return hclge_tm_lvl34_schd_mode_cfg(hdev);  in hclge_tm_schd_mode_hw()
1467 int hclge_tm_schd_setup_hw(struct hclge_dev *hdev)  in hclge_tm_schd_setup_hw()  argument
1472 	ret = hclge_tm_map_cfg(hdev);  in hclge_tm_schd_setup_hw()
1477 	ret = hclge_tm_shaper_cfg(hdev);  in hclge_tm_schd_setup_hw()
1482 	ret = hclge_tm_dwrr_cfg(hdev);  in hclge_tm_schd_setup_hw()
1487 	return hclge_tm_schd_mode_hw(hdev);  in hclge_tm_schd_setup_hw()
1490 static int hclge_pause_param_setup_hw(struct hclge_dev *hdev)  in hclge_pause_param_setup_hw()  argument
1492 	struct hclge_mac *mac = &hdev->hw.mac;  in hclge_pause_param_setup_hw()
1494 	return hclge_pause_param_cfg(hdev, mac->mac_addr,  in hclge_pause_param_setup_hw()
1499 static int hclge_pfc_setup_hw(struct hclge_dev *hdev)  in hclge_pfc_setup_hw()  argument
1503 	if (hdev->tm_info.fc_mode == HCLGE_FC_PFC)  in hclge_pfc_setup_hw()
1507 	return hclge_pfc_pause_en_cfg(hdev, enable_bitmap,  in hclge_pfc_setup_hw()
1508 				      hdev->tm_info.pfc_en);  in hclge_pfc_setup_hw()
1514 static int hclge_bp_setup_hw(struct hclge_dev *hdev, u8 tc)  in hclge_bp_setup_hw()  argument
1521 	if (hdev->num_tqps > HCLGE_TQP_MAX_SIZE_DEV_V2) {  in hclge_bp_setup_hw()
1531 		for (k = 0; k < hdev->num_alloc_vport; k++) {  in hclge_bp_setup_hw()
1532 			struct hclge_vport *vport = &hdev->vport[k];  in hclge_bp_setup_hw()
1543 		ret = hclge_tm_qs_bp_cfg(hdev, tc, i, qs_bitmap);  in hclge_bp_setup_hw()
1551 static int hclge_mac_pause_setup_hw(struct hclge_dev *hdev)  in hclge_mac_pause_setup_hw()  argument
1555 	switch (hdev->tm_info.fc_mode) {  in hclge_mac_pause_setup_hw()
1581 	return hclge_mac_pause_en_cfg(hdev, tx_en, rx_en);  in hclge_mac_pause_setup_hw()
1584 static int hclge_tm_bp_setup(struct hclge_dev *hdev)  in hclge_tm_bp_setup()  argument
1589 	for (i = 0; i < hdev->tm_info.num_tc; i++) {  in hclge_tm_bp_setup()
1590 		ret = hclge_bp_setup_hw(hdev, i);  in hclge_tm_bp_setup()
1598 int hclge_pause_setup_hw(struct hclge_dev *hdev, bool init)  in hclge_pause_setup_hw()  argument
1602 	ret = hclge_pause_param_setup_hw(hdev);  in hclge_pause_setup_hw()
1606 	ret = hclge_mac_pause_setup_hw(hdev);  in hclge_pause_setup_hw()
1611 	if (!hnae3_dev_dcb_supported(hdev))  in hclge_pause_setup_hw()
1618 	ret = hclge_pfc_setup_hw(hdev);  in hclge_pause_setup_hw()
1620 		dev_warn(&hdev->pdev->dev, "GE MAC does not support pfc\n");  in hclge_pause_setup_hw()
1622 		dev_err(&hdev->pdev->dev, "config pfc failed! ret = %d\n",  in hclge_pause_setup_hw()
1627 	return hclge_tm_bp_setup(hdev);  in hclge_pause_setup_hw()
1630 void hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc)  in hclge_tm_prio_tc_info_update()  argument
1632 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_prio_tc_info_update()
1637 		hdev->tm_info.prio_tc[i] = prio_tc[i];  in hclge_tm_prio_tc_info_update()
1639 		for (k = 0;  k < hdev->num_alloc_vport; k++) {  in hclge_tm_prio_tc_info_update()
1646 void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)  in hclge_tm_schd_info_update()  argument
1651 	hdev->tm_info.num_tc = num_tc;  in hclge_tm_schd_info_update()
1653 	for (i = 0; i < hdev->tm_info.num_tc; i++)  in hclge_tm_schd_info_update()
1658 		hdev->tm_info.num_tc = 1;  in hclge_tm_schd_info_update()
1661 	hdev->hw_tc_map = bit_map;  in hclge_tm_schd_info_update()
1663 	hclge_tm_schd_info_init(hdev);  in hclge_tm_schd_info_update()
1666 int hclge_tm_init_hw(struct hclge_dev *hdev, bool init)  in hclge_tm_init_hw()  argument
1670 	if ((hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE) &&  in hclge_tm_init_hw()
1671 	    (hdev->tx_sch_mode != HCLGE_FLAG_VNET_BASE_SCH_MODE))  in hclge_tm_init_hw()
1674 	ret = hclge_tm_schd_setup_hw(hdev);  in hclge_tm_init_hw()
1678 	ret = hclge_pause_setup_hw(hdev, init);  in hclge_tm_init_hw()
1685 int hclge_tm_schd_init(struct hclge_dev *hdev)  in hclge_tm_schd_init()  argument
1688 	hdev->tm_info.fc_mode = HCLGE_FC_FULL;  in hclge_tm_schd_init()
1689 	hdev->fc_mode_last_time = hdev->tm_info.fc_mode;  in hclge_tm_schd_init()
1691 	if (hdev->tx_sch_mode != HCLGE_FLAG_TC_BASE_SCH_MODE &&  in hclge_tm_schd_init()
1692 	    hdev->tm_info.num_pg != 1)  in hclge_tm_schd_init()
1695 	hclge_tm_schd_info_init(hdev);  in hclge_tm_schd_init()
1696 	hclge_dscp_to_prio_map_init(hdev);  in hclge_tm_schd_init()
1698 	return hclge_tm_init_hw(hdev, true);  in hclge_tm_schd_init()
1701 int hclge_tm_vport_map_update(struct hclge_dev *hdev)  in hclge_tm_vport_map_update()  argument
1703 	struct hclge_vport *vport = hdev->vport;  in hclge_tm_vport_map_update()
1708 	ret = hclge_vport_q_to_qs_map(hdev, vport);  in hclge_tm_vport_map_update()
1712 	if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en)  in hclge_tm_vport_map_update()
1715 	return hclge_tm_bp_setup(hdev);  in hclge_tm_vport_map_update()
1718 int hclge_tm_get_qset_num(struct hclge_dev *hdev, u16 *qset_num)  in hclge_tm_get_qset_num()  argument
1724 	if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2) {  in hclge_tm_get_qset_num()
1726 		*qset_num = HCLGE_TM_PF_MAX_QSET_NUM + pci_num_vf(hdev->pdev);  in hclge_tm_get_qset_num()
1731 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_qset_num()
1733 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_qset_num()
1743 int hclge_tm_get_pri_num(struct hclge_dev *hdev, u8 *pri_num)  in hclge_tm_get_pri_num()  argument
1749 	if (hdev->ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2) {  in hclge_tm_get_pri_num()
1755 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pri_num()
1757 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pri_num()
1767 int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority,  in hclge_tm_get_qset_map_pri()  argument
1777 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_qset_map_pri()
1779 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_qset_map_pri()
1789 int hclge_tm_get_qset_sch_mode(struct hclge_dev *hdev, u16 qset_id, u8 *mode)  in hclge_tm_get_qset_sch_mode()  argument
1798 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_qset_sch_mode()
1800 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_qset_sch_mode()
1809 int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight)  in hclge_tm_get_qset_weight()  argument
1818 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_qset_weight()
1820 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_qset_weight()
1829 int hclge_tm_get_qset_shaper(struct hclge_dev *hdev, u16 qset_id,  in hclge_tm_get_qset_shaper()  argument
1840 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_qset_shaper()
1842 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_qset_shaper()
1859 int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode)  in hclge_tm_get_pri_sch_mode()  argument
1868 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pri_sch_mode()
1870 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pri_sch_mode()
1879 int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight)  in hclge_tm_get_pri_weight()  argument
1888 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pri_weight()
1890 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pri_weight()
1899 int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id,  in hclge_tm_get_pri_shaper()  argument
1915 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pri_shaper()
1917 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pri_shaper()
1934 int hclge_tm_get_q_to_qs_map(struct hclge_dev *hdev, u16 q_id, u16 *qset_id)  in hclge_tm_get_q_to_qs_map()  argument
1945 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_q_to_qs_map()
1947 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_q_to_qs_map()
1972 int hclge_tm_get_q_to_tc(struct hclge_dev *hdev, u16 q_id, u8 *tc_id)  in hclge_tm_get_q_to_tc()  argument
1983 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_q_to_tc()
1985 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_q_to_tc()
1994 int hclge_tm_get_pg_to_pri_map(struct hclge_dev *hdev, u8 pg_id,  in hclge_tm_get_pg_to_pri_map()  argument
2004 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pg_to_pri_map()
2006 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pg_to_pri_map()
2015 int hclge_tm_get_pg_weight(struct hclge_dev *hdev, u8 pg_id, u8 *weight)  in hclge_tm_get_pg_weight()  argument
2024 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pg_weight()
2026 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pg_weight()
2035 int hclge_tm_get_pg_sch_mode(struct hclge_dev *hdev, u8 pg_id, u8 *mode)  in hclge_tm_get_pg_sch_mode()  argument
2042 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pg_sch_mode()
2044 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pg_sch_mode()
2053 int hclge_tm_get_pg_shaper(struct hclge_dev *hdev, u8 pg_id,  in hclge_tm_get_pg_shaper()  argument
2069 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_pg_shaper()
2071 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_pg_shaper()
2088 int hclge_tm_get_port_shaper(struct hclge_dev *hdev,  in hclge_tm_get_port_shaper()  argument
2097 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);  in hclge_tm_get_port_shaper()
2099 		dev_err(&hdev->pdev->dev,  in hclge_tm_get_port_shaper()