568 static void *__retrieve_octeon_config_info(struct octeon_device *oct,  in __retrieve_octeon_config_info()  argument
571 	u32 oct_id = oct->octeon_id;  in __retrieve_octeon_config_info()
576 		if (oct->chip_id == OCTEON_CN66XX) {  in __retrieve_octeon_config_info()
578 		} else if ((oct->chip_id == OCTEON_CN68XX) &&  in __retrieve_octeon_config_info()
581 		} else if ((oct->chip_id == OCTEON_CN68XX) &&  in __retrieve_octeon_config_info()
584 		} else if (oct->chip_id == OCTEON_CN23XX_PF_VID) {  in __retrieve_octeon_config_info()
586 		} else if (oct->chip_id == OCTEON_CN23XX_VF_VID) {  in __retrieve_octeon_config_info()
596 static int __verify_octeon_config_info(struct octeon_device *oct, void *conf)  in __verify_octeon_config_info()  argument
598 	switch (oct->chip_id) {  in __verify_octeon_config_info()
601 		return lio_validate_cn6xxx_config_info(oct, conf);  in __verify_octeon_config_info()
612 void *oct_get_config_info(struct octeon_device *oct, u16 card_type)  in oct_get_config_info()  argument
616 	conf = __retrieve_octeon_config_info(oct, card_type);  in oct_get_config_info()
620 	if (__verify_octeon_config_info(oct, conf)) {  in oct_get_config_info()
621 		dev_err(&oct->pci_dev->dev, "Configuration verification failed\n");  in oct_get_config_info()
644 void octeon_free_device_mem(struct octeon_device *oct)  in octeon_free_device_mem()  argument
648 	for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {  in octeon_free_device_mem()
649 		if (oct->io_qmask.oq & BIT_ULL(i))  in octeon_free_device_mem()
650 			vfree(oct->droq[i]);  in octeon_free_device_mem()
653 	for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {  in octeon_free_device_mem()
654 		if (oct->io_qmask.iq & BIT_ULL(i))  in octeon_free_device_mem()
655 			vfree(oct->instr_queue[i]);  in octeon_free_device_mem()
658 	i = oct->octeon_id;  in octeon_free_device_mem()
659 	vfree(oct);  in octeon_free_device_mem()
668 	struct octeon_device *oct;  in octeon_allocate_device_mem()  local
708 	oct = (struct octeon_device *)buf;  in octeon_allocate_device_mem()
709 	oct->priv = (void *)(buf + octdevsize);  in octeon_allocate_device_mem()
710 	oct->chip = (void *)(buf + octdevsize + priv_size);  in octeon_allocate_device_mem()
711 	oct->dispatch.dlist = (struct octeon_dispatch *)  in octeon_allocate_device_mem()
714 	return oct;  in octeon_allocate_device_mem()
721 	struct octeon_device *oct = NULL;  in octeon_allocate_device()  local
730 		oct = octeon_allocate_device_mem(pci_id, priv_size);  in octeon_allocate_device()
731 		if (oct) {  in octeon_allocate_device()
733 			octeon_device[oct_idx] = oct;  in octeon_allocate_device()
738 	if (!oct)  in octeon_allocate_device()
741 	spin_lock_init(&oct->pci_win_lock);  in octeon_allocate_device()
742 	spin_lock_init(&oct->mem_access_lock);  in octeon_allocate_device()
744 	oct->octeon_id = oct_idx;  in octeon_allocate_device()
745 	snprintf(oct->device_name, sizeof(oct->device_name),  in octeon_allocate_device()
746 		 "LiquidIO%d", (oct->octeon_id));  in octeon_allocate_device()
748 	return oct;  in octeon_allocate_device()
759 int octeon_register_device(struct octeon_device *oct,  in octeon_register_device()  argument
764 	oct->loc.bus = bus;  in octeon_register_device()
765 	oct->loc.dev = dev;  in octeon_register_device()
766 	oct->loc.func = func;  in octeon_register_device()
768 	oct->adapter_refcount = &adapter_refcounts[oct->octeon_id];  in octeon_register_device()
769 	atomic_set(oct->adapter_refcount, 0);  in octeon_register_device()
772 	oct->adapter_fw_state = &adapter_fw_states[oct->octeon_id];  in octeon_register_device()
773 	atomic_set(oct->adapter_fw_state, FW_NEEDS_TO_BE_LOADED);  in octeon_register_device()
776 	for (idx = (int)oct->octeon_id - 1; idx >= 0; idx--) {  in octeon_register_device()
778 			dev_err(&oct->pci_dev->dev,  in octeon_register_device()
782 			atomic_inc(oct->adapter_refcount);  in octeon_register_device()
790 			oct->adapter_refcount =  in octeon_register_device()
792 			oct->adapter_fw_state =  in octeon_register_device()
799 	atomic_inc(oct->adapter_refcount);  in octeon_register_device()
800 	refcount = atomic_read(oct->adapter_refcount);  in octeon_register_device()
802 	dev_dbg(&oct->pci_dev->dev, "%s: %02x:%02x:%d refcount %u", __func__,  in octeon_register_device()
803 		oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);  in octeon_register_device()
812 int octeon_deregister_device(struct octeon_device *oct)  in octeon_deregister_device()  argument
816 	atomic_dec(oct->adapter_refcount);  in octeon_deregister_device()
817 	refcount = atomic_read(oct->adapter_refcount);  in octeon_deregister_device()
819 	dev_dbg(&oct->pci_dev->dev, "%s: %04d:%02d:%d refcount %u", __func__,  in octeon_deregister_device()
820 		oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);  in octeon_deregister_device()
826 octeon_allocate_ioq_vector(struct octeon_device *oct, u32 num_ioqs)  in octeon_allocate_ioq_vector()  argument
835 	oct->ioq_vector = vzalloc(size);  in octeon_allocate_ioq_vector()
836 	if (!oct->ioq_vector)  in octeon_allocate_ioq_vector()
839 		ioq_vector		= &oct->ioq_vector[i];  in octeon_allocate_ioq_vector()
840 		ioq_vector->oct_dev	= oct;  in octeon_allocate_ioq_vector()
843 		ioq_vector->mbox	= oct->mbox[i];  in octeon_allocate_ioq_vector()
848 		if (oct->chip_id == OCTEON_CN23XX_PF_VID)  in octeon_allocate_ioq_vector()
849 			ioq_vector->ioq_num	= i + oct->sriov_info.pf_srn;  in octeon_allocate_ioq_vector()
858 octeon_free_ioq_vector(struct octeon_device *oct)  in octeon_free_ioq_vector()  argument
860 	vfree(oct->ioq_vector);  in octeon_free_ioq_vector()
864 int octeon_setup_instr_queues(struct octeon_device *oct)  in octeon_setup_instr_queues()  argument
869 	int numa_node = dev_to_node(&oct->pci_dev->dev);  in octeon_setup_instr_queues()
871 	if (OCTEON_CN6XXX(oct))  in octeon_setup_instr_queues()
873 			CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn6xxx));  in octeon_setup_instr_queues()
874 	else if (OCTEON_CN23XX_PF(oct))  in octeon_setup_instr_queues()
875 		num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_instr_queues()
876 	else if (OCTEON_CN23XX_VF(oct))  in octeon_setup_instr_queues()
877 		num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_instr_queues()
879 	oct->num_iqs = 0;  in octeon_setup_instr_queues()
881 	oct->instr_queue[0] = vzalloc_node(sizeof(*oct->instr_queue[0]),  in octeon_setup_instr_queues()
883 	if (!oct->instr_queue[0])  in octeon_setup_instr_queues()
884 		oct->instr_queue[0] =  in octeon_setup_instr_queues()
886 	if (!oct->instr_queue[0])  in octeon_setup_instr_queues()
888 	memset(oct->instr_queue[0], 0, sizeof(struct octeon_instr_queue));  in octeon_setup_instr_queues()
889 	oct->instr_queue[0]->q_index = 0;  in octeon_setup_instr_queues()
890 	oct->instr_queue[0]->app_ctx = (void *)(size_t)0;  in octeon_setup_instr_queues()
891 	oct->instr_queue[0]->ifidx = 0;  in octeon_setup_instr_queues()
894 	txpciq.s.pkind = oct->pfvf_hsword.pkind;  in octeon_setup_instr_queues()
897 	if (octeon_init_instr_queue(oct, txpciq, num_descs)) {  in octeon_setup_instr_queues()
899 		vfree(oct->instr_queue[0]);  in octeon_setup_instr_queues()
900 		oct->instr_queue[0] = NULL;  in octeon_setup_instr_queues()
904 	oct->num_iqs++;  in octeon_setup_instr_queues()
908 int octeon_setup_output_queues(struct octeon_device *oct)  in octeon_setup_output_queues()  argument
913 	int numa_node = dev_to_node(&oct->pci_dev->dev);  in octeon_setup_output_queues()
915 	if (OCTEON_CN6XXX(oct)) {  in octeon_setup_output_queues()
917 			CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn6xxx));  in octeon_setup_output_queues()
919 			CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn6xxx));  in octeon_setup_output_queues()
920 	} else if (OCTEON_CN23XX_PF(oct)) {  in octeon_setup_output_queues()
921 		num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_output_queues()
922 		desc_size = CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_output_queues()
923 	} else if (OCTEON_CN23XX_VF(oct)) {  in octeon_setup_output_queues()
924 		num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_output_queues()
925 		desc_size = CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_output_queues()
927 	oct->num_oqs = 0;  in octeon_setup_output_queues()
928 	oct->droq[0] = vzalloc_node(sizeof(*oct->droq[0]), numa_node);  in octeon_setup_output_queues()
929 	if (!oct->droq[0])  in octeon_setup_output_queues()
930 		oct->droq[0] = vzalloc(sizeof(*oct->droq[0]));  in octeon_setup_output_queues()
931 	if (!oct->droq[0])  in octeon_setup_output_queues()
934 	if (octeon_init_droq(oct, oq_no, num_descs, desc_size, NULL)) {  in octeon_setup_output_queues()
935 		vfree(oct->droq[oq_no]);  in octeon_setup_output_queues()
936 		oct->droq[oq_no] = NULL;  in octeon_setup_output_queues()
939 	oct->num_oqs++;  in octeon_setup_output_queues()
944 int octeon_set_io_queues_off(struct octeon_device *oct)  in octeon_set_io_queues_off()  argument
948 	if (OCTEON_CN6XXX(oct)) {  in octeon_set_io_queues_off()
949 		octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);  in octeon_set_io_queues_off()
950 		octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);  in octeon_set_io_queues_off()
951 	} else if (oct->chip_id == OCTEON_CN23XX_VF_VID) {  in octeon_set_io_queues_off()
958 		for (q_no = 0; q_no < oct->sriov_info.rings_per_vf; q_no++) {  in octeon_set_io_queues_off()
960 				oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
966 					oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
970 				dev_err(&oct->pci_dev->dev,  in octeon_set_io_queues_off()
977 			octeon_write_csr64(oct,  in octeon_set_io_queues_off()
982 					oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
984 				dev_err(&oct->pci_dev->dev,  in octeon_set_io_queues_off()
993 void octeon_set_droq_pkt_op(struct octeon_device *oct,  in octeon_set_droq_pkt_op()  argument
1000 	if (OCTEON_CN6XXX(oct)) {  in octeon_set_droq_pkt_op()
1001 		reg_val = octeon_read_csr(oct, CN6XXX_SLI_PKT_OUT_ENB);  in octeon_set_droq_pkt_op()
1008 		octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, reg_val);  in octeon_set_droq_pkt_op()
1012 int octeon_init_dispatch_list(struct octeon_device *oct)  in octeon_init_dispatch_list()  argument
1016 	oct->dispatch.count = 0;  in octeon_init_dispatch_list()
1019 		oct->dispatch.dlist[i].opcode = 0;  in octeon_init_dispatch_list()
1020 		INIT_LIST_HEAD(&oct->dispatch.dlist[i].list);  in octeon_init_dispatch_list()
1024 		octeon_register_reqtype_free_fn(oct, i, NULL);  in octeon_init_dispatch_list()
1026 	spin_lock_init(&oct->dispatch.lock);  in octeon_init_dispatch_list()
1031 void octeon_delete_dispatch_list(struct octeon_device *oct)  in octeon_delete_dispatch_list()  argument
1038 	spin_lock_bh(&oct->dispatch.lock);  in octeon_delete_dispatch_list()
1043 		dispatch = &oct->dispatch.dlist[i].list;  in octeon_delete_dispatch_list()
1049 		oct->dispatch.dlist[i].opcode = 0;  in octeon_delete_dispatch_list()
1052 	oct->dispatch.count = 0;  in octeon_delete_dispatch_list()
1054 	spin_unlock_bh(&oct->dispatch.lock);  in octeon_delete_dispatch_list()
1121 octeon_register_dispatch_fn(struct octeon_device *oct,  in octeon_register_dispatch_fn()  argument
1132 	spin_lock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1134 	if (oct->dispatch.dlist[idx].opcode == 0) {  in octeon_register_dispatch_fn()
1135 		oct->dispatch.dlist[idx].opcode = combined_opcode;  in octeon_register_dispatch_fn()
1136 		oct->dispatch.dlist[idx].dispatch_fn = fn;  in octeon_register_dispatch_fn()
1137 		oct->dispatch.dlist[idx].arg = fn_arg;  in octeon_register_dispatch_fn()
1138 		oct->dispatch.count++;  in octeon_register_dispatch_fn()
1139 		spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1143 	spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1148 	pfn = octeon_get_dispatch(oct, opcode, subcode);  in octeon_register_dispatch_fn()
1152 		dev_dbg(&oct->pci_dev->dev,  in octeon_register_dispatch_fn()
1165 		spin_lock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1166 		list_add(&dispatch->list, &oct->dispatch.dlist[idx].list);  in octeon_register_dispatch_fn()
1167 		oct->dispatch.count++;  in octeon_register_dispatch_fn()
1168 		spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1172 		    octeon_get_dispatch_arg(oct, opcode, subcode) == fn_arg)  in octeon_register_dispatch_fn()
1175 		dev_err(&oct->pci_dev->dev,  in octeon_register_dispatch_fn()
1188 	struct octeon_device *oct = (struct octeon_device *)buf;  in octeon_core_drv_init()  local
1193 	if (OCTEON_CN6XXX(oct))  in octeon_core_drv_init()
1195 			CFG_GET_NUM_NIC_PORTS(CHIP_CONF(oct, cn6xxx));  in octeon_core_drv_init()
1196 	else if (OCTEON_CN23XX_PF(oct))  in octeon_core_drv_init()
1198 			CFG_GET_NUM_NIC_PORTS(CHIP_CONF(oct, cn23xx_pf));  in octeon_core_drv_init()
1200 	if (atomic_read(&oct->status) >= OCT_DEV_RUNNING) {  in octeon_core_drv_init()
1201 		dev_err(&oct->pci_dev->dev, "Received CORE OK when device state is 0x%x\n",  in octeon_core_drv_init()
1202 			atomic_read(&oct->status));  in octeon_core_drv_init()
1210 	oct->app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1212 		oct->fw_info.max_nic_ports =  in octeon_core_drv_init()
1214 		oct->fw_info.num_gmx_ports =  in octeon_core_drv_init()
1218 	if (oct->fw_info.max_nic_ports < num_nic_ports) {  in octeon_core_drv_init()
1219 		dev_err(&oct->pci_dev->dev,  in octeon_core_drv_init()
1221 			num_nic_ports, oct->fw_info.max_nic_ports);  in octeon_core_drv_init()
1224 	oct->fw_info.app_cap_flags = recv_pkt->rh.r_core_drv_init.app_cap_flags;  in octeon_core_drv_init()
1225 	oct->fw_info.app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1226 	oct->pfvf_hsword.app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1228 	oct->pfvf_hsword.pkind = recv_pkt->rh.r_core_drv_init.pkind;  in octeon_core_drv_init()
1230 	for (i = 0; i < oct->num_iqs; i++)  in octeon_core_drv_init()
1231 		oct->instr_queue[i]->txpciq.s.pkind = oct->pfvf_hsword.pkind;  in octeon_core_drv_init()
1233 	atomic_set(&oct->status, OCT_DEV_CORE_OK);  in octeon_core_drv_init()
1235 	cs = &core_setup[oct->octeon_id];  in octeon_core_drv_init()
1238 		dev_dbg(&oct->pci_dev->dev, "Core setup bytes expected %u found %d\n",  in octeon_core_drv_init()
1246 	strncpy(oct->boardinfo.name, cs->boardname, OCT_BOARD_NAME);  in octeon_core_drv_init()
1247 	strncpy(oct->boardinfo.serial_number, cs->board_serial_number,  in octeon_core_drv_init()
1252 	oct->boardinfo.major = cs->board_rev_major;  in octeon_core_drv_init()
1253 	oct->boardinfo.minor = cs->board_rev_minor;  in octeon_core_drv_init()
1255 	dev_info(&oct->pci_dev->dev,  in octeon_core_drv_init()
1266 int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no)  in octeon_get_tx_qsize()  argument
1269 	if (oct && (q_no < MAX_OCTEON_INSTR_QUEUES(oct)) &&  in octeon_get_tx_qsize()
1270 	    (oct->io_qmask.iq & BIT_ULL(q_no)))  in octeon_get_tx_qsize()
1271 		return oct->instr_queue[q_no]->max_count;  in octeon_get_tx_qsize()
1276 int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no)  in octeon_get_rx_qsize()  argument
1278 	if (oct && (q_no < MAX_OCTEON_OUTPUT_QUEUES(oct)) &&  in octeon_get_rx_qsize()
1279 	    (oct->io_qmask.oq & BIT_ULL(q_no)))  in octeon_get_rx_qsize()
1280 		return oct->droq[q_no]->max_count;  in octeon_get_rx_qsize()
1285 struct octeon_config *octeon_get_conf(struct octeon_device *oct)  in octeon_get_conf()  argument
1293 	if (OCTEON_CN6XXX(oct)) {  in octeon_get_conf()
1295 			(struct octeon_config *)(CHIP_CONF(oct, cn6xxx));  in octeon_get_conf()
1296 	} else if (OCTEON_CN23XX_PF(oct)) {  in octeon_get_conf()
1298 			(CHIP_CONF(oct, cn23xx_pf));  in octeon_get_conf()
1299 	} else if (OCTEON_CN23XX_VF(oct)) {  in octeon_get_conf()
1301 			(CHIP_CONF(oct, cn23xx_vf));  in octeon_get_conf()
1322 u64 lio_pci_readq(struct octeon_device *oct, u64 addr)  in lio_pci_readq()  argument
1328 	spin_lock_irqsave(&oct->pci_win_lock, flags);  in lio_pci_readq()
1334 	if ((oct->chip_id == OCTEON_CN66XX) ||  in lio_pci_readq()
1335 	    (oct->chip_id == OCTEON_CN68XX) ||  in lio_pci_readq()
1336 	    (oct->chip_id == OCTEON_CN23XX_PF_VID))  in lio_pci_readq()
1338 	writel(addrhi, oct->reg_list.pci_win_rd_addr_hi);  in lio_pci_readq()
1341 	readl(oct->reg_list.pci_win_rd_addr_hi);  in lio_pci_readq()
1343 	writel(addr & 0xffffffff, oct->reg_list.pci_win_rd_addr_lo);  in lio_pci_readq()
1344 	readl(oct->reg_list.pci_win_rd_addr_lo);  in lio_pci_readq()
1346 	val64 = readq(oct->reg_list.pci_win_rd_data);  in lio_pci_readq()
1348 	spin_unlock_irqrestore(&oct->pci_win_lock, flags);  in lio_pci_readq()
1353 void lio_pci_writeq(struct octeon_device *oct,  in lio_pci_writeq()  argument
1359 	spin_lock_irqsave(&oct->pci_win_lock, flags);  in lio_pci_writeq()
1361 	writeq(addr, oct->reg_list.pci_win_wr_addr);  in lio_pci_writeq()
1364 	writel(val >> 32, oct->reg_list.pci_win_wr_data_hi);  in lio_pci_writeq()
1366 	readl(oct->reg_list.pci_win_wr_data_hi);  in lio_pci_writeq()
1368 	writel(val & 0xffffffff, oct->reg_list.pci_win_wr_data_lo);  in lio_pci_writeq()
1370 	spin_unlock_irqrestore(&oct->pci_win_lock, flags);  in lio_pci_writeq()
1373 int octeon_mem_access_ok(struct octeon_device *oct)  in octeon_mem_access_ok()  argument
1379 	if (OCTEON_CN23XX_PF(oct)) {  in octeon_mem_access_ok()
1380 		lmc0_reset_ctl = lio_pci_readq(oct, CN23XX_LMC0_RESET_CTL);  in octeon_mem_access_ok()
1384 		lmc0_reset_ctl = lio_pci_readq(oct, CN6XXX_LMC0_RESET_CTL);  in octeon_mem_access_ok()
1392 int octeon_wait_for_ddr_init(struct octeon_device *oct, u32 *timeout)  in octeon_wait_for_ddr_init()  argument
1402 		ret = octeon_mem_access_ok(oct);  in octeon_wait_for_ddr_init()
1432 	struct octeon_device *oct = NULL;  in lio_enable_irq()  local
1439 		oct = droq->oct_dev;  in lio_enable_irq()
1448 		oct = iq->oct_dev;  in lio_enable_irq()
1453 	if (oct && (OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct))) {  in lio_enable_irq()