269 	link_status = REG_RD(bp, params->shmem_base +  in bnx2x_check_lfa()
2103 	REG_WR(bp, params->shmem_base +  in bnx2x_update_mng()
2885 		eee_mode = ((REG_RD(bp, params->shmem_base +  in bnx2x_eee_calc_timer()
3062 	board_cfg = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3070 	sfp_ctrl = REG_RD(bp, params->shmem_base +  in bnx2x_bsc_module_sel()
3812 	if (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
3852 		wc_lane_config = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_enable_AN_KR()
4004 		cfg_tap_val = REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_set_10G_XFI()
4330 						u32 shmem_base, u8 port,  in bnx2x_get_mod_abs_int_cfg()  argument
4337 		cfg_pin = (REG_RD(bp, shmem_base +  in bnx2x_get_mod_abs_int_cfg()
4374 				      params->shmem_base, params->port,  in bnx2x_is_sfp_module_plugged()
4414 		serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_runtime()
4477 	cfg_pin = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e3_set_transmitter()
4498 	serdes_net_if = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_config_init()
4813 	vars->link_status = REG_RD(bp, params->shmem_base +  in bnx2x_link_status_update()
4830 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
4847 	sync_offset = params->shmem_base +  in bnx2x_link_status_update()
7421 	if (REG_RD(bp, params->shmem_base +  in bnx2x_8073_config_init()
7708 	bnx2x_save_spirom_version(bp, params->port, params->shmem_base, 0);  in bnx2x_8705_config_init()
7794 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_e1e2_set_transmitter()
7926 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_warpcore_power_module()
8222 	sync_offset = params->shmem_base +  in bnx2x_get_edc_mode()
8270 	val = REG_RD(bp, params->shmem_base +  in bnx2x_verify_sfp_module()
8535 	u32 fault_led_gpio = REG_RD(bp, params->shmem_base +  in bnx2x_set_e1e2_module_fault_led()
8568 	pin_cfg = (REG_RD(bp, params->shmem_base +  in bnx2x_set_e3_module_fault_led()
8690 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_sfp_module_detection()
8751 	if (bnx2x_get_mod_abs_int_cfg(bp, params->chip_id, params->shmem_base,  in bnx2x_handle_module_detect_int()
8984 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8706_config_init()
9352 	tx_en_mode = REG_RD(bp, params->shmem_base +  in bnx2x_8727_config_init()
9380 	u32 val = REG_RD(bp, params->shmem_base +  in bnx2x_8727_handle_mod_abs()
10153 	pair_swap = REG_RD(bp, params->shmem_base +  in bnx2x_848xx_pair_swap_cfg()
10230 	shmem_base_path[0] = params->shmem_base;  in bnx2x_84833_hw_reset_phy()
10403 		u32 cms_enable = REG_RD(bp, params->shmem_base +  in bnx2x_848x3_config_init()
11053 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_config_init()
11292 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_54618se_link_reset()
12146 static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,  in bnx2x_populate_preemphasis()  argument
12158 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12162 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12166 			rx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12170 			tx = REG_RD(bp, shmem_base +  in bnx2x_populate_preemphasis()
12183 static u32 bnx2x_get_ext_phy_config(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_config()  argument
12189 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12194 		ext_phy_config = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_config()
12205 static int bnx2x_populate_int_phy(struct bnx2x *bp, u32 shmem_base, u8 port,  in bnx2x_populate_int_phy()  argument
12210 	u32 switch_cfg = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12228 		serdes_net_if = (REG_RD(bp, shmem_base +  in bnx2x_populate_int_phy()
12338 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, INT_PHY);  in bnx2x_populate_int_phy()
12344 				  u32 shmem_base,  in bnx2x_populate_ext_phy()  argument
12351 	ext_phy_config = bnx2x_get_ext_phy_config(bp, shmem_base,  in bnx2x_populate_ext_phy()
12418 	bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);  in bnx2x_populate_ext_phy()
12424 	config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12427 		phy->ver_addr = shmem_base + offsetof(struct shmem_region,  in bnx2x_populate_ext_phy()
12470 static int bnx2x_populate_phy(struct bnx2x *bp, u8 phy_index, u32 shmem_base,  in bnx2x_populate_phy()  argument
12475 		return bnx2x_populate_int_phy(bp, shmem_base, port, phy);  in bnx2x_populate_phy()
12477 	return bnx2x_populate_ext_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_populate_phy()
12489 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12492 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12497 		link_config = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12500 		phy->speed_cap_mask = REG_RD(bp, params->shmem_base +  in bnx2x_phy_def_cfg()
12612 		if (bnx2x_populate_phy(bp, phy_index, params->shmem_base,  in bnx2x_phy_probe()
12635 		sync_offset = params->shmem_base +  in bnx2x_phy_probe()
13199 		u32 shmem_base, shmem2_base;  in bnx2x_8073_common_init_phy()  local
13202 			shmem_base = shmem_base_path[0];  in bnx2x_8073_common_init_phy()
13206 			shmem_base = shmem_base_path[port];  in bnx2x_8073_common_init_phy()
13212 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8073_common_init_phy()
13326 		u32 shmem_base, shmem2_base;  in bnx2x_8726_common_init_phy()  local
13330 			shmem_base = shmem_base_path[0];  in bnx2x_8726_common_init_phy()
13333 			shmem_base = shmem_base_path[port];  in bnx2x_8726_common_init_phy()
13337 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8726_common_init_phy()
13357 static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,  in bnx2x_get_ext_phy_reset_gpio()  argument
13361 	u32 phy_gpio_reset = REG_RD(bp, shmem_base +  in bnx2x_get_ext_phy_reset_gpio()
13439 		u32 shmem_base, shmem2_base;  in bnx2x_8727_common_init_phy()  local
13443 			shmem_base = shmem_base_path[0];  in bnx2x_8727_common_init_phy()
13447 			shmem_base = shmem_base_path[port];  in bnx2x_8727_common_init_phy()
13453 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_8727_common_init_phy()
13622 	cfg_pin = (REG_RD(bp, params->shmem_base +  in bnx2x_check_over_curr()
13793 	cfg_pin = (REG_RD(bp, params->shmem_base + offsetof(struct shmem_region,  in bnx2x_sfp_tx_fault_detection()
13936 		if ((REG_RD(bp, params->shmem_base +  in bnx2x_period_func()
13956 			     u32 shmem_base,  in bnx2x_fan_failure_det_req()  argument
13964 		if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base,  in bnx2x_fan_failure_det_req()
13999 			    u32 chip_id, u32 shmem_base, u32 shmem2_base,  in bnx2x_init_mod_abs_int()  argument
14007 					      shmem_base,  in bnx2x_init_mod_abs_int()
14016 			if (bnx2x_populate_phy(bp, phy_index, shmem_base,  in bnx2x_init_mod_abs_int()
14043 	sync_offset = shmem_base +  in bnx2x_init_mod_abs_int()