39 			dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \
55 	void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
64 	void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \
87 u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode);
95 void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link);
106 int bnx2x_rss(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj,
118 void bnx2x__init_func_obj(struct bnx2x *bp);
128 int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp,
136 int bnx2x_setup_leading(struct bnx2x *bp);
147 u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param);
155 int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode);
162 void bnx2x_link_set(struct bnx2x *bp);
170 void bnx2x_force_link_reset(struct bnx2x *bp);
180 u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes);
190 void bnx2x_drv_pulse(struct bnx2x *bp);
202 void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment,
206 void bnx2x_pf_disable(struct bnx2x *bp);
207 int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val);
214 void bnx2x__link_status_update(struct bnx2x *bp);
221 void bnx2x_link_report(struct bnx2x *bp);
224 void __bnx2x_link_report(struct bnx2x *bp);
233 u16 bnx2x_get_mf_speed(struct bnx2x *bp);
257 int bnx2x_cnic_notify(struct bnx2x *bp, int cmd);
264 void bnx2x_setup_cnic_irq_info(struct bnx2x *bp);
271 void bnx2x_setup_cnic_info(struct bnx2x *bp);
278 void bnx2x_int_enable(struct bnx2x *bp);
289 void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw);
302 void bnx2x_nic_init_cnic(struct bnx2x *bp);
314 void bnx2x_pre_irq_nic_init(struct bnx2x *bp);
327 void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code);
333 int bnx2x_alloc_mem_cnic(struct bnx2x *bp);
339 int bnx2x_alloc_mem(struct bnx2x *bp);
346 void bnx2x_free_mem_cnic(struct bnx2x *bp);
352 void bnx2x_free_mem(struct bnx2x *bp);
359 void bnx2x_set_num_queues(struct bnx2x *bp);
372 void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link);
380 int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource);
388 int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource);
395 int bnx2x_release_leader_lock(struct bnx2x *bp);
405 int bnx2x_set_eth_mac(struct bnx2x *bp, bool set);
416 void bnx2x_set_rx_mode_inner(struct bnx2x *bp);
419 void bnx2x_set_pf_load(struct bnx2x *bp);
420 bool bnx2x_clear_pf_load(struct bnx2x *bp);
421 bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print);
422 bool bnx2x_reset_is_done(struct bnx2x *bp, int engine);
423 void bnx2x_set_reset_in_progress(struct bnx2x *bp);
424 void bnx2x_set_reset_global(struct bnx2x *bp);
425 void bnx2x_disable_close_the_gate(struct bnx2x *bp);
426 int bnx2x_init_hw_func_cnic(struct bnx2x *bp);
428 void bnx2x_clear_vlan_info(struct bnx2x *bp);
443 void bnx2x_ilt_set_info(struct bnx2x *bp);
451 void bnx2x_ilt_set_info_cnic(struct bnx2x *bp);
458 void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem);
468 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state);
476 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value);
478 void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl);
481 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link);
484 int bnx2x_nic_load(struct bnx2x *bp, int load_mode);
505 static inline void bnx2x_update_rx_prod(struct bnx2x *bp,  in bnx2x_update_rx_prod()  argument
528 		REG_WR_RELAXED(bp, fp->ustorm_rx_prods_offset + i * 4,  in bnx2x_update_rx_prod()
542 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata);
547 void bnx2x_free_irq(struct bnx2x *bp);
549 void bnx2x_free_fp_mem(struct bnx2x *bp);
550 void bnx2x_init_rx_rings(struct bnx2x *bp);
551 void bnx2x_init_rx_rings_cnic(struct bnx2x *bp);
552 void bnx2x_free_skbs(struct bnx2x *bp);
553 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw);
554 void bnx2x_netif_start(struct bnx2x *bp);
555 int bnx2x_load_cnic(struct bnx2x *bp);
565 int bnx2x_enable_msix(struct bnx2x *bp);
572 int bnx2x_enable_msi(struct bnx2x *bp);
579 int bnx2x_alloc_mem_bp(struct bnx2x *bp);
586 void bnx2x_free_mem_bp(struct bnx2x *bp);
626 void bnx2x_get_c2s_mapping(struct bnx2x *bp, u8 *c2s_map, u8 *c2s_default);
636 static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id,  in bnx2x_igu_ack_sb_gen()  argument
650 	REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags);  in bnx2x_igu_ack_sb_gen()
656 static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id,  in bnx2x_hc_ack_sb()  argument
659 	u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +  in bnx2x_hc_ack_sb()
670 	REG_WR(bp, hc_addr, (*(u32 *)&igu_ack));  in bnx2x_hc_ack_sb()
676 static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm,  in bnx2x_ack_sb()  argument
679 	if (bp->common.int_block == INT_BLOCK_HC)  in bnx2x_ack_sb()
680 		bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update);  in bnx2x_ack_sb()
684 		if (CHIP_INT_MODE_IS_BC(bp))  in bnx2x_ack_sb()
686 		else if (igu_sb_id != bp->igu_dsb_id)  in bnx2x_ack_sb()
692 		bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update);  in bnx2x_ack_sb()
696 static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp)  in bnx2x_hc_ack_int()  argument
698 	u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 +  in bnx2x_hc_ack_int()
700 	u32 result = REG_RD(bp, hc_addr);  in bnx2x_hc_ack_int()
706 static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp)  in bnx2x_igu_ack_int()  argument
709 	u32 result = REG_RD(bp, igu_addr);  in bnx2x_igu_ack_int()
718 static inline u16 bnx2x_ack_int(struct bnx2x *bp)  in bnx2x_ack_int()  argument
721 	if (bp->common.int_block == INT_BLOCK_HC)  in bnx2x_ack_int()
722 		return bnx2x_hc_ack_int(bp);  in bnx2x_ack_int()
724 		return bnx2x_igu_ack_int(bp);  in bnx2x_ack_int()
734 static inline u16 bnx2x_tx_avail(struct bnx2x *bp,  in bnx2x_tx_avail()  argument
793 static inline void bnx2x_tx_disable(struct bnx2x *bp)  in bnx2x_tx_disable()  argument
795 	netif_tx_disable(bp->dev);  in bnx2x_tx_disable()
796 	netif_carrier_off(bp->dev);  in bnx2x_tx_disable()
799 static inline void bnx2x_free_rx_sge(struct bnx2x *bp,  in bnx2x_free_rx_sge()  argument
813 	dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping),  in bnx2x_free_rx_sge()
823 static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp)  in bnx2x_del_all_napi_cnic()  argument
827 	for_each_rx_queue_cnic(bp, i) {  in bnx2x_del_all_napi_cnic()
828 		__netif_napi_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi_cnic()
833 static inline void bnx2x_del_all_napi(struct bnx2x *bp)  in bnx2x_del_all_napi()  argument
837 	for_each_eth_queue(bp, i) {  in bnx2x_del_all_napi()
838 		__netif_napi_del(&bnx2x_fp(bp, i, napi));  in bnx2x_del_all_napi()
843 int bnx2x_set_int_mode(struct bnx2x *bp);
845 static inline void bnx2x_disable_msi(struct bnx2x *bp)  in bnx2x_disable_msi()  argument
847 	if (bp->flags & USING_MSIX_FLAG) {  in bnx2x_disable_msi()
848 		pci_disable_msix(bp->pdev);  in bnx2x_disable_msi()
849 		bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG);  in bnx2x_disable_msi()
850 	} else if (bp->flags & USING_MSI_FLAG) {  in bnx2x_disable_msi()
851 		pci_disable_msi(bp->pdev);  in bnx2x_disable_msi()
852 		bp->flags &= ~USING_MSI_FLAG;  in bnx2x_disable_msi()
904 static inline int func_by_vn(struct bnx2x *bp, int vn)  in func_by_vn()  argument
906 	return 2 * vn + BP_PORT(bp);  in func_by_vn()
909 static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash)  in bnx2x_config_rss_eth()  argument
911 	return bnx2x_rss(bp, &bp->rss_conf_obj, config_hash, true);  in bnx2x_config_rss_eth()
921 static inline int bnx2x_func_start(struct bnx2x *bp)  in bnx2x_func_start()  argument
931 	func_params.f_obj = &bp->func_obj;  in bnx2x_func_start()
935 	start_params->mf_mode = bp->mf_mode;  in bnx2x_func_start()
936 	start_params->sd_vlan_tag = bp->mf_ov;  in bnx2x_func_start()
939 	if (IS_MF_BD(bp)) {  in bnx2x_func_start()
942 		REG_WR(bp, PRS_REG_VLAN_TYPE_0, ETH_P_8021AD);  in bnx2x_func_start()
943 		REG_WR(bp, PBF_REG_VLAN_TYPE_0, ETH_P_8021AD);  in bnx2x_func_start()
944 		REG_WR(bp, NIG_REG_LLH_E1HOV_TYPE_1, ETH_P_8021AD);  in bnx2x_func_start()
946 		bnx2x_get_c2s_mapping(bp, start_params->c2s_pri,  in bnx2x_func_start()
959 	if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp))  in bnx2x_func_start()
963 	if (bp->udp_tunnel_ports[BNX2X_UDP_PORT_VXLAN]) {  in bnx2x_func_start()
964 		port = bp->udp_tunnel_ports[BNX2X_UDP_PORT_VXLAN];  in bnx2x_func_start()
967 	if (bp->udp_tunnel_ports[BNX2X_UDP_PORT_GENEVE]) {  in bnx2x_func_start()
968 		port = bp->udp_tunnel_ports[BNX2X_UDP_PORT_GENEVE];  in bnx2x_func_start()
974 	if (IS_MF_UFP(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) {  in bnx2x_func_start()
980 	return bnx2x_func_state_change(bp, &func_params);  in bnx2x_func_start()
1002 static inline void bnx2x_free_rx_mem_pool(struct bnx2x *bp,  in bnx2x_free_rx_mem_pool()  argument
1013 static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp,  in bnx2x_free_rx_sge_range()  argument
1022 		bnx2x_free_rx_sge(bp, fp, i);  in bnx2x_free_rx_sge_range()
1024 	bnx2x_free_rx_mem_pool(bp, &fp->page_pool);  in bnx2x_free_rx_sge_range()
1049 	struct bnx2x *bp = fp->bp;  in bnx2x_stats_id()  local
1050 	if (!CHIP_IS_E1x(bp)) {  in bnx2x_stats_id()
1053 			return bp->cnic_base_cl_id + (bp->pf_num >> 1);  in bnx2x_stats_id()
1056 	return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x;  in bnx2x_stats_id()
1062 	struct bnx2x *bp = fp->bp;  in bnx2x_init_vlan_mac_fp_objs()  local
1065 	bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id,  in bnx2x_init_vlan_mac_fp_objs()
1066 			   fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1067 			   bnx2x_sp_mapping(bp, mac_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1069 			   &bp->sp_state, obj_type,  in bnx2x_init_vlan_mac_fp_objs()
1070 			   &bp->macs_pool);  in bnx2x_init_vlan_mac_fp_objs()
1072 	if (!CHIP_IS_E1x(bp))  in bnx2x_init_vlan_mac_fp_objs()
1073 		bnx2x_init_vlan_obj(bp, &bnx2x_sp_obj(bp, fp).vlan_obj,  in bnx2x_init_vlan_mac_fp_objs()
1074 				    fp->cl_id, fp->cid, BP_FUNC(bp),  in bnx2x_init_vlan_mac_fp_objs()
1075 				    bnx2x_sp(bp, vlan_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1076 				    bnx2x_sp_mapping(bp, vlan_rdata),  in bnx2x_init_vlan_mac_fp_objs()
1078 				    &bp->sp_state, obj_type,  in bnx2x_init_vlan_mac_fp_objs()
1079 				    &bp->vlans_pool);  in bnx2x_init_vlan_mac_fp_objs()
1090 static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp)  in bnx2x_get_path_func_num()  argument
1095 	if (CHIP_IS_E1(bp))  in bnx2x_get_path_func_num()
1101 	if (CHIP_REV_IS_SLOW(bp)) {  in bnx2x_get_path_func_num()
1102 		if (IS_MF(bp))  in bnx2x_get_path_func_num()
1109 				MF_CFG_RD(bp,  in bnx2x_get_path_func_num()
1110 					  func_mf_config[BP_PATH(bp) + 2 * i].  in bnx2x_get_path_func_num()
1122 static inline void bnx2x_init_bp_objs(struct bnx2x *bp)  in bnx2x_init_bp_objs()  argument
1125 	bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj);  in bnx2x_init_bp_objs()
1128 	bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid,  in bnx2x_init_bp_objs()
1129 			     BP_FUNC(bp), BP_FUNC(bp),  in bnx2x_init_bp_objs()
1130 			     bnx2x_sp(bp, mcast_rdata),  in bnx2x_init_bp_objs()
1131 			     bnx2x_sp_mapping(bp, mcast_rdata),  in bnx2x_init_bp_objs()
1132 			     BNX2X_FILTER_MCAST_PENDING, &bp->sp_state,  in bnx2x_init_bp_objs()
1136 	bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp),  in bnx2x_init_bp_objs()
1137 				   bnx2x_get_path_func_num(bp));  in bnx2x_init_bp_objs()
1139 	bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_FUNC(bp),  in bnx2x_init_bp_objs()
1140 				    bnx2x_get_path_func_num(bp));  in bnx2x_init_bp_objs()
1143 	bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id,  in bnx2x_init_bp_objs()
1144 				  bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp),  in bnx2x_init_bp_objs()
1145 				  bnx2x_sp(bp, rss_rdata),  in bnx2x_init_bp_objs()
1146 				  bnx2x_sp_mapping(bp, rss_rdata),  in bnx2x_init_bp_objs()
1147 				  BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state,  in bnx2x_init_bp_objs()
1150 	bp->vlan_credit = PF_VLAN_CREDIT_E2(bp, bnx2x_get_path_func_num(bp));  in bnx2x_init_bp_objs()
1155 	if (CHIP_IS_E1x(fp->bp))  in bnx2x_fp_qzone_id()
1156 		return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H;  in bnx2x_fp_qzone_id()
1161 static inline void bnx2x_init_txdata(struct bnx2x *bp,  in bnx2x_init_txdata()  argument
1170 	txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size;  in bnx2x_init_txdata()
1176 static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx)  in bnx2x_cnic_eth_cl_id()  argument
1178 	return bp->cnic_base_cl_id + cl_idx +  in bnx2x_cnic_eth_cl_id()
1179 		(bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX;  in bnx2x_cnic_eth_cl_id()
1182 static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp)  in bnx2x_cnic_fw_sb_id()  argument
1185 	return bp->base_fw_ndsb;  in bnx2x_cnic_fw_sb_id()
1188 static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp)  in bnx2x_cnic_igu_sb_id()  argument
1190 	return bp->igu_base_sb;  in bnx2x_cnic_igu_sb_id()
1193 static inline int bnx2x_clean_tx_queue(struct bnx2x *bp,  in bnx2x_clean_tx_queue()  argument
1217 int bnx2x_get_link_cfg_idx(struct bnx2x *bp);
1219 static inline void __storm_memset_struct(struct bnx2x *bp,  in __storm_memset_struct()  argument
1224 		REG_WR(bp, addr + (i * 4), data[i]);  in __storm_memset_struct()
1233 static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask)  in bnx2x_wait_sp_comp()  argument
1239 		netif_addr_lock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1240 		if (!(bp->sp_state & mask)) {  in bnx2x_wait_sp_comp()
1241 			netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1244 		netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1251 	netif_addr_lock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1252 	if (bp->sp_state & mask) {  in bnx2x_wait_sp_comp()
1254 			  bp->sp_state, mask);  in bnx2x_wait_sp_comp()
1255 		netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1258 	netif_addr_unlock_bh(bp->dev);  in bnx2x_wait_sp_comp()
1270 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
1273 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
1275 void bnx2x_acquire_phy_lock(struct bnx2x *bp);
1276 void bnx2x_release_phy_lock(struct bnx2x *bp);
1285 static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg)  in bnx2x_extract_max_cfg()  argument
1316 void bnx2x_get_iscsi_info(struct bnx2x *bp);
1324 static inline void bnx2x_link_sync_notify(struct bnx2x *bp)  in bnx2x_link_sync_notify()  argument
1330 	for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) {  in bnx2x_link_sync_notify()
1331 		if (vn == BP_VN(bp))  in bnx2x_link_sync_notify()
1334 		func = func_by_vn(bp, vn);  in bnx2x_link_sync_notify()
1335 		REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 +  in bnx2x_link_sync_notify()
1348 static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)  in bnx2x_update_drv_flags()  argument
1350 	if (SHMEM2_HAS(bp, drv_flags)) {  in bnx2x_update_drv_flags()
1352 		bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS);  in bnx2x_update_drv_flags()
1353 		drv_flags = SHMEM2_RD(bp, drv_flags);  in bnx2x_update_drv_flags()
1360 		SHMEM2_WR(bp, drv_flags, drv_flags);  in bnx2x_update_drv_flags()
1362 		bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS);  in bnx2x_update_drv_flags()
1376 void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len);
1378 int bnx2x_drain_tx_queues(struct bnx2x *bp);
1379 void bnx2x_squeeze_objects(struct bnx2x *bp);
1390 void bnx2x_set_os_driver_state(struct bnx2x *bp, u32 state);
1400 int bnx2x_nvram_read(struct bnx2x *bp, u32 offset, u8 *ret_buf,