Lines Matching refs:bnx2_reg_wr_ind

277 bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)  in bnx2_reg_wr_ind()  function
290 bnx2_reg_wr_ind(bp, bp->shmem_base + offset, val); in bnx2_shmem_wr()
334 bnx2_reg_wr_ind(bp, io->offset, io->data); in bnx2_drv_ctl()
2676 bnx2_reg_wr_ind(bp, BNX2_RBUF_COMMAND, in bnx2_alloc_bad_rbuf()
2700 bnx2_reg_wr_ind(bp, BNX2_RBUF_FW_BUF_FREE, val); in bnx2_alloc_bad_rbuf()
3844 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw()
3845 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw()
3858 bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); in load_cpu_fw()
3872 bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); in load_cpu_fw()
3886 bnx2_reg_wr_ind(bp, offset, be32_to_cpu(data[j])); in load_cpu_fw()
3890 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw()
3893 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw()
3898 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw()
3899 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw()
5003 bnx2_reg_wr_ind(bp, BNX2_RBUF_CONFIG, BNX2_RBUF_CONFIG_VAL(mtu)); in bnx2_init_chip()
5004 bnx2_reg_wr_ind(bp, BNX2_RBUF_CONFIG2, BNX2_RBUF_CONFIG2_VAL(mtu)); in bnx2_init_chip()
5005 bnx2_reg_wr_ind(bp, BNX2_RBUF_CONFIG3, BNX2_RBUF_CONFIG3_VAL(mtu)); in bnx2_init_chip()
5070 bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 1); in bnx2_init_chip()
5072 bnx2_reg_wr_ind(bp, BNX2_FW_RX_LOW_LATENCY, 0); in bnx2_init_chip()
5336 bnx2_reg_wr_ind(bp, BNX2_RXP_SCRATCH_RSS_TBL_SZ, 0); in bnx2_init_all_rings()
5745 bnx2_reg_wr_ind(bp, start + offset, test_pattern[i]); in bnx2_do_mem_test()