Lines Matching refs:pdata
15 static void xgene_enet_wr_csr(struct xgene_enet_pdata *pdata, in xgene_enet_wr_csr() argument
18 void __iomem *addr = pdata->eth_csr_addr + offset; in xgene_enet_wr_csr()
23 static void xgene_enet_wr_ring_if(struct xgene_enet_pdata *pdata, in xgene_enet_wr_ring_if() argument
26 void __iomem *addr = pdata->eth_ring_if_addr + offset; in xgene_enet_wr_ring_if()
31 static void xgene_enet_wr_diag_csr(struct xgene_enet_pdata *pdata, in xgene_enet_wr_diag_csr() argument
34 void __iomem *addr = pdata->eth_diag_csr_addr + offset; in xgene_enet_wr_diag_csr()
62 static void xgene_enet_wr_pcs(struct xgene_enet_pdata *pdata, in xgene_enet_wr_pcs() argument
67 addr = pdata->pcs_addr + PCS_ADDR_REG_OFFSET; in xgene_enet_wr_pcs()
68 wr = pdata->pcs_addr + PCS_WRITE_REG_OFFSET; in xgene_enet_wr_pcs()
69 cmd = pdata->pcs_addr + PCS_COMMAND_REG_OFFSET; in xgene_enet_wr_pcs()
70 cmd_done = pdata->pcs_addr + PCS_COMMAND_DONE_REG_OFFSET; in xgene_enet_wr_pcs()
73 netdev_err(pdata->ndev, "PCS write failed, addr: %04x\n", in xgene_enet_wr_pcs()
77 static void xgene_enet_wr_axg_csr(struct xgene_enet_pdata *pdata, in xgene_enet_wr_axg_csr() argument
80 void __iomem *addr = pdata->mcx_mac_csr_addr + offset; in xgene_enet_wr_axg_csr()
85 static void xgene_enet_rd_csr(struct xgene_enet_pdata *pdata, in xgene_enet_rd_csr() argument
88 void __iomem *addr = pdata->eth_csr_addr + offset; in xgene_enet_rd_csr()
93 static void xgene_enet_rd_diag_csr(struct xgene_enet_pdata *pdata, in xgene_enet_rd_diag_csr() argument
96 void __iomem *addr = pdata->eth_diag_csr_addr + offset; in xgene_enet_rd_diag_csr()
124 static bool xgene_enet_rd_pcs(struct xgene_enet_pdata *pdata, in xgene_enet_rd_pcs() argument
130 addr = pdata->pcs_addr + PCS_ADDR_REG_OFFSET; in xgene_enet_rd_pcs()
131 rd = pdata->pcs_addr + PCS_READ_REG_OFFSET; in xgene_enet_rd_pcs()
132 cmd = pdata->pcs_addr + PCS_COMMAND_REG_OFFSET; in xgene_enet_rd_pcs()
133 cmd_done = pdata->pcs_addr + PCS_COMMAND_DONE_REG_OFFSET; in xgene_enet_rd_pcs()
137 netdev_err(pdata->ndev, "PCS read failed, addr: %04x\n", in xgene_enet_rd_pcs()
143 static void xgene_enet_rd_axg_csr(struct xgene_enet_pdata *pdata, in xgene_enet_rd_axg_csr() argument
146 void __iomem *addr = pdata->mcx_mac_csr_addr + offset; in xgene_enet_rd_axg_csr()
151 static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata) in xgene_enet_ecc_init() argument
153 struct net_device *ndev = pdata->ndev; in xgene_enet_ecc_init()
157 xgene_enet_wr_diag_csr(pdata, ENET_CFG_MEM_RAM_SHUTDOWN_ADDR, 0x0); in xgene_enet_ecc_init()
160 xgene_enet_rd_diag_csr(pdata, ENET_BLOCK_MEM_RDY_ADDR, &data); in xgene_enet_ecc_init()
171 static void xgene_xgmac_get_drop_cnt(struct xgene_enet_pdata *pdata, in xgene_xgmac_get_drop_cnt() argument
176 xgene_enet_rd_axg_csr(pdata, XGENET_ICM_ECM_DROP_COUNT_REG0, &count); in xgene_xgmac_get_drop_cnt()
180 xgene_enet_rd_axg_csr(pdata, XGENET_ECM_CONFIG0_REG_0, &count); in xgene_xgmac_get_drop_cnt()
183 static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata) in xgene_enet_config_ring_if_assoc() argument
185 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
186 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIFPQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
187 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEWQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
188 xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIQMLITEFPQASSOC_ADDR, 0); in xgene_enet_config_ring_if_assoc()
191 static void xgene_xgmac_reset(struct xgene_enet_pdata *pdata) in xgene_xgmac_reset() argument
193 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_0, HSTMACRST); in xgene_xgmac_reset()
194 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_0, 0); in xgene_xgmac_reset()
197 static void xgene_pcs_reset(struct xgene_enet_pdata *pdata) in xgene_pcs_reset() argument
201 if (!xgene_enet_rd_pcs(pdata, PCS_CONTROL_1, &data)) in xgene_pcs_reset()
204 xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data | PCS_CTRL_PCS_RST); in xgene_pcs_reset()
205 xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data & ~PCS_CTRL_PCS_RST); in xgene_pcs_reset()
208 static void xgene_xgmac_set_mac_addr(struct xgene_enet_pdata *pdata) in xgene_xgmac_set_mac_addr() argument
210 const u8 *dev_addr = pdata->ndev->dev_addr; in xgene_xgmac_set_mac_addr()
217 xgene_enet_wr_mac(pdata, HSTMACADR_LSW_ADDR, addr0); in xgene_xgmac_set_mac_addr()
218 xgene_enet_wr_mac(pdata, HSTMACADR_MSW_ADDR, addr1); in xgene_xgmac_set_mac_addr()
221 static void xgene_xgmac_set_mss(struct xgene_enet_pdata *pdata, in xgene_xgmac_set_mss() argument
228 xgene_enet_rd_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, &data); in xgene_xgmac_set_mss()
236 xgene_enet_wr_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, data); in xgene_xgmac_set_mss()
239 static void xgene_xgmac_set_frame_size(struct xgene_enet_pdata *pdata, int size) in xgene_xgmac_set_frame_size() argument
241 xgene_enet_wr_mac(pdata, HSTMAXFRAME_LENGTH_ADDR, in xgene_xgmac_set_frame_size()
245 static u32 xgene_enet_link_status(struct xgene_enet_pdata *pdata) in xgene_enet_link_status() argument
249 xgene_enet_rd_csr(pdata, XG_LINK_STATUS_ADDR, &data); in xgene_enet_link_status()
254 static void xgene_xgmac_enable_tx_pause(struct xgene_enet_pdata *pdata, in xgene_xgmac_enable_tx_pause() argument
259 xgene_enet_rd_axg_csr(pdata, XGENET_CSR_ECM_CFG_0_ADDR, &data); in xgene_xgmac_enable_tx_pause()
266 xgene_enet_wr_axg_csr(pdata, XGENET_CSR_ECM_CFG_0_ADDR, data); in xgene_xgmac_enable_tx_pause()
269 static void xgene_xgmac_flowctl_tx(struct xgene_enet_pdata *pdata, bool enable) in xgene_xgmac_flowctl_tx() argument
273 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_flowctl_tx()
280 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data); in xgene_xgmac_flowctl_tx()
282 pdata->mac_ops->enable_tx_pause(pdata, enable); in xgene_xgmac_flowctl_tx()
285 static void xgene_xgmac_flowctl_rx(struct xgene_enet_pdata *pdata, bool enable) in xgene_xgmac_flowctl_rx() argument
289 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_flowctl_rx()
296 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data); in xgene_xgmac_flowctl_rx()
299 static void xgene_xgmac_init(struct xgene_enet_pdata *pdata) in xgene_xgmac_init() argument
303 xgene_xgmac_reset(pdata); in xgene_xgmac_init()
305 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_init()
308 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data); in xgene_xgmac_init()
310 xgene_xgmac_set_mac_addr(pdata); in xgene_xgmac_init()
312 xgene_enet_rd_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, &data); in xgene_xgmac_init()
316 xgene_enet_wr_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, data); in xgene_xgmac_init()
319 xgene_enet_rd_csr(pdata, XG_RSIF_CONFIG1_REG_ADDR, &data); in xgene_xgmac_init()
321 xgene_enet_wr_csr(pdata, XG_RSIF_CONFIG1_REG_ADDR, data); in xgene_xgmac_init()
323 xgene_enet_rd_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, &data); in xgene_xgmac_init()
325 xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, data); in xgene_xgmac_init()
326 xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_1_ADDR, 0x82); in xgene_xgmac_init()
327 xgene_enet_wr_csr(pdata, XGENET_RX_DV_GATE_REG_0_ADDR, 0); in xgene_xgmac_init()
328 xgene_enet_wr_csr(pdata, XG_CFG_BYPASS_ADDR, RESUME_TX); in xgene_xgmac_init()
331 xgene_enet_rd_axg_csr(pdata, XGENET_CSR_MULTI_DPF0_ADDR, &data); in xgene_xgmac_init()
333 xgene_enet_wr_axg_csr(pdata, XGENET_CSR_MULTI_DPF0_ADDR, data); in xgene_xgmac_init()
335 if (pdata->enet_id != XGENE_ENET1) { in xgene_xgmac_init()
336 xgene_enet_rd_axg_csr(pdata, XGENET_CSR_MULTI_DPF1_ADDR, &data); in xgene_xgmac_init()
338 xgene_enet_wr_axg_csr(pdata, XGENET_CSR_MULTI_DPF1_ADDR, data); in xgene_xgmac_init()
342 xgene_enet_wr_csr(pdata, XG_RXBUF_PAUSE_THRESH, data); in xgene_xgmac_init()
344 xgene_xgmac_flowctl_tx(pdata, pdata->tx_pause); in xgene_xgmac_init()
345 xgene_xgmac_flowctl_rx(pdata, pdata->rx_pause); in xgene_xgmac_init()
348 static void xgene_xgmac_rx_enable(struct xgene_enet_pdata *pdata) in xgene_xgmac_rx_enable() argument
352 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_rx_enable()
353 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTRFEN); in xgene_xgmac_rx_enable()
356 static void xgene_xgmac_tx_enable(struct xgene_enet_pdata *pdata) in xgene_xgmac_tx_enable() argument
360 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_tx_enable()
361 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTTFEN); in xgene_xgmac_tx_enable()
364 static void xgene_xgmac_rx_disable(struct xgene_enet_pdata *pdata) in xgene_xgmac_rx_disable() argument
368 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_rx_disable()
369 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data & ~HSTRFEN); in xgene_xgmac_rx_disable()
372 static void xgene_xgmac_tx_disable(struct xgene_enet_pdata *pdata) in xgene_xgmac_tx_disable() argument
376 data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1); in xgene_xgmac_tx_disable()
377 xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data & ~HSTTFEN); in xgene_xgmac_tx_disable()
380 static int xgene_enet_reset(struct xgene_enet_pdata *pdata) in xgene_enet_reset() argument
382 struct device *dev = &pdata->pdev->dev; in xgene_enet_reset()
384 if (!xgene_ring_mgr_init(pdata)) in xgene_enet_reset()
388 clk_prepare_enable(pdata->clk); in xgene_enet_reset()
390 clk_disable_unprepare(pdata->clk); in xgene_enet_reset()
392 clk_prepare_enable(pdata->clk); in xgene_enet_reset()
398 status = acpi_evaluate_object(ACPI_HANDLE(&pdata->pdev->dev), in xgene_enet_reset()
401 acpi_evaluate_object(ACPI_HANDLE(&pdata->pdev->dev), in xgene_enet_reset()
407 xgene_enet_ecc_init(pdata); in xgene_enet_reset()
408 xgene_enet_config_ring_if_assoc(pdata); in xgene_enet_reset()
413 static void xgene_enet_xgcle_bypass(struct xgene_enet_pdata *pdata, in xgene_enet_xgcle_bypass() argument
419 xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG0_ADDR, &cb); in xgene_enet_xgcle_bypass()
422 xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG0_ADDR, cb); in xgene_enet_xgcle_bypass()
426 xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG1_ADDR, &cb); in xgene_enet_xgcle_bypass()
430 xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG1_ADDR, cb); in xgene_enet_xgcle_bypass()
434 static void xgene_enet_shutdown(struct xgene_enet_pdata *pdata) in xgene_enet_shutdown() argument
436 struct device *dev = &pdata->pdev->dev; in xgene_enet_shutdown()
439 if (!IS_ERR(pdata->clk)) in xgene_enet_shutdown()
440 clk_disable_unprepare(pdata->clk); in xgene_enet_shutdown()
444 static void xgene_enet_clear(struct xgene_enet_pdata *pdata, in xgene_enet_clear() argument
457 xgene_enet_wr_ring_if(pdata, addr, data); in xgene_enet_clear()
460 static int xgene_enet_gpio_lookup(struct xgene_enet_pdata *pdata) in xgene_enet_gpio_lookup() argument
462 struct device *dev = &pdata->pdev->dev; in xgene_enet_gpio_lookup()
464 pdata->sfp_rdy = gpiod_get(dev, "rxlos", GPIOD_IN); in xgene_enet_gpio_lookup()
465 if (IS_ERR(pdata->sfp_rdy)) in xgene_enet_gpio_lookup()
466 pdata->sfp_rdy = gpiod_get(dev, "sfp", GPIOD_IN); in xgene_enet_gpio_lookup()
468 if (IS_ERR(pdata->sfp_rdy)) in xgene_enet_gpio_lookup()
476 struct xgene_enet_pdata *pdata = container_of(to_delayed_work(work), in xgene_enet_link_state() local
478 struct net_device *ndev = pdata->ndev; in xgene_enet_link_state()
481 link_status = xgene_enet_link_status(pdata); in xgene_enet_link_state()
482 if (pdata->sfp_gpio_en && link_status && in xgene_enet_link_state()
483 (!IS_ERR(pdata->sfp_rdy) || !xgene_enet_gpio_lookup(pdata)) && in xgene_enet_link_state()
484 !gpiod_get_value(pdata->sfp_rdy)) in xgene_enet_link_state()
490 xgene_xgmac_rx_enable(pdata); in xgene_enet_link_state()
491 xgene_xgmac_tx_enable(pdata); in xgene_enet_link_state()
497 xgene_xgmac_rx_disable(pdata); in xgene_enet_link_state()
498 xgene_xgmac_tx_disable(pdata); in xgene_enet_link_state()
504 xgene_pcs_reset(pdata); in xgene_enet_link_state()
507 schedule_delayed_work(&pdata->link_work, poll_interval); in xgene_enet_link_state()