315 		outb_p(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD);  in ne_probe1()
317 		outb_p(0xff, ioaddr + 0x0d);  in ne_probe1()
318 		outb_p(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD);  in ne_probe1()
321 			outb_p(reg0, ioaddr);  in ne_probe1()
322 			outb_p(regd, ioaddr + 0x0d);	/* Restore the old values. */  in ne_probe1()
361 		outb_p(0xff, ioaddr + EN0_ISR);		/* Ack all intr. */  in ne_probe1()
387 			outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in ne_probe1()
402 		outb_p(DCR_VAL, ioaddr + EN0_DCFG);  in ne_probe1()
473 		outb_p(0x50, ioaddr + EN0_IMR);	/* Enable one interrupt. */  in ne_probe1()
474 		outb_p(0x00, ioaddr + EN0_RCNTLO);  in ne_probe1()
475 		outb_p(0x00, ioaddr + EN0_RCNTHI);  in ne_probe1()
476 		outb_p(E8390_RREAD+E8390_START, ioaddr); /* Trigger it... */  in ne_probe1()
478 		outb_p(0x00, ioaddr + EN0_IMR); 		/* Mask it again. */  in ne_probe1()
566 	outb_p(ENISR_RESET, NE_BASE + EN0_ISR);	/* Ack intr. */  in ne_reset_8390()
588 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);  in ne_get_8390_hdr()
589 	outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in ne_get_8390_hdr()
590 	outb_p(0, nic_base + EN0_RCNTHI);  in ne_get_8390_hdr()
591 	outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in ne_get_8390_hdr()
592 	outb_p(ring_page, nic_base + EN0_RSARHI);  in ne_get_8390_hdr()
593 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_get_8390_hdr()
600 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_get_8390_hdr()
629 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);  in ne_block_input()
630 	outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in ne_block_input()
631 	outb_p(count >> 8, nic_base + EN0_RCNTHI);  in ne_block_input()
632 	outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in ne_block_input()
633 	outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in ne_block_input()
634 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_block_input()
674 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_block_input()
705 	outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);  in ne_block_output()
717 	outb_p(0x42, nic_base + EN0_RCNTLO);  in ne_block_output()
718 	outb_p(0x00,   nic_base + EN0_RCNTHI);  in ne_block_output()
719 	outb_p(0x42, nic_base + EN0_RSARLO);  in ne_block_output()
720 	outb_p(0x00, nic_base + EN0_RSARHI);  in ne_block_output()
721 	outb_p(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ne_block_output()
726 	outb_p(ENISR_RDC, nic_base + EN0_ISR);  in ne_block_output()
729 	outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in ne_block_output()
730 	outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in ne_block_output()
731 	outb_p(0x00, nic_base + EN0_RSARLO);  in ne_block_output()
732 	outb_p(start_page, nic_base + EN0_RSARHI);  in ne_block_output()
734 	outb_p(E8390_RWRITE+E8390_START, nic_base + NE_CMD);  in ne_block_output()
778 	outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ne_block_output()