47 #define ei_outb(_v, _a) writeb(_v, ax_convert_addr(_a))  macro
50 #define ei_outb_p(_v, _a) ei_outb(_v, _a)
128 	ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_check()
130 	ei_outb(0xff, ioaddr + 0x0d);  in ax_initial_check()
131 	ei_outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);  in ax_initial_check()
134 		ei_outb(reg0, ioaddr);  in ax_initial_check()
135 		ei_outb(regd, ioaddr + 0x0d);	/* Restore the old values. */  in ax_initial_check()
154 	ei_outb(ei_inb(addr + NE_RESET), addr + NE_RESET);  in ax_reset_8390()
167 	ei_outb(ENISR_RESET, addr + EN0_ISR);	/* Ack intr. */  in ax_reset_8390()
202 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
203 	ei_outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in ax_get_8390_hdr()
204 	ei_outb(0, nic_base + EN0_RCNTHI);  in ax_get_8390_hdr()
205 	ei_outb(0, nic_base + EN0_RSARLO);		/* On page boundary */  in ax_get_8390_hdr()
206 	ei_outb(ring_page, nic_base + EN0_RSARHI);  in ax_get_8390_hdr()
207 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
216 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_get_8390_hdr()
248 	ei_outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + NE_CMD);  in ax_block_input()
249 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_input()
250 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_input()
251 	ei_outb(ring_offset & 0xff, nic_base + EN0_RSARLO);  in ax_block_input()
252 	ei_outb(ring_offset >> 8, nic_base + EN0_RSARHI);  in ax_block_input()
253 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_block_input()
293 	ei_outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);  in ax_block_output()
295 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);  in ax_block_output()
298 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_output()
299 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_output()
300 	ei_outb(0x00, nic_base + EN0_RSARLO);  in ax_block_output()
301 	ei_outb(start_page, nic_base + EN0_RSARHI);  in ax_block_output()
303 	ei_outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);  in ax_block_output()
320 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_block_output()
404 	ei_outb(reg_gpoc, ei_local->mem + EI_SHIFT(0x17));  in ax_phy_switch()
416 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_mdc()
428 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_dir()
440 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_set_data()
637 	ei_outb(reg, ei_local->mem + AX_MEMR);  in ax_eeprom_register_write()
666 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_setup()
669 	ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG);  in ax_initial_setup()
670 	ei_outb(ax->plat->gpoc_val, ioaddr + EI_SHIFT(0x17));  in ax_initial_setup()
704 		ei_outb(6, ioaddr + EN0_RCNTLO);  in ax_init_dev()
705 		ei_outb(0, ioaddr + EN0_RCNTHI);  in ax_init_dev()
706 		ei_outb(0, ioaddr + EN0_RSARLO);  in ax_init_dev()
707 		ei_outb(0, ioaddr + EN0_RSARHI);  in ax_init_dev()
708 		ei_outb(E8390_RREAD + E8390_START, ioaddr + NE_CMD);  in ax_init_dev()
713 		ei_outb(ENISR_RDC, ioaddr + EN0_ISR);	/* Ack intr. */  in ax_init_dev()
741 		ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG);  in ax_init_dev()
753 		ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP,  in ax_init_dev()