109 				     int spec_reg, u32 value)  in esdhc_readl_fixup()  argument
123 	if ((spec_reg == SDHCI_CAPABILITIES) && (value & SDHCI_CAN_DO_ADMA1)) {  in esdhc_readl_fixup()
136 	if (spec_reg == SDHCI_PRESENT_STATE) {  in esdhc_readl_fixup()
148 	if (spec_reg == SDHCI_CAPABILITIES_1) {  in esdhc_readl_fixup()
161 	if ((spec_reg == SDHCI_PRESENT_STATE) &&  in esdhc_readl_fixup()
172 				     int spec_reg, u32 value)  in esdhc_readw_fixup()  argument
177 	int shift = (spec_reg & 0x2) * 8;  in esdhc_readw_fixup()
179 	if (spec_reg == SDHCI_TRANSFER_MODE)  in esdhc_readw_fixup()
182 	if (spec_reg == SDHCI_HOST_VERSION)  in esdhc_readw_fixup()
189 	if ((spec_reg == SDHCI_HOST_VERSION) &&  in esdhc_readw_fixup()
196 				     int spec_reg, u32 value)  in esdhc_readb_fixup()  argument
200 	int shift = (spec_reg & 0x3) * 8;  in esdhc_readb_fixup()
208 	if (spec_reg == SDHCI_HOST_CONTROL) {  in esdhc_readb_fixup()
235 				     int spec_reg, u32 value, u32 old_value)  in esdhc_writel_fixup()  argument
244 	if (spec_reg == SDHCI_INT_ENABLE)  in esdhc_writel_fixup()
253 				     int spec_reg, u16 value, u32 old_value)  in esdhc_writew_fixup()  argument
256 	int shift = (spec_reg & 0x2) * 8;  in esdhc_writew_fixup()
259 	switch (spec_reg) {  in esdhc_writew_fixup()
275 	if (spec_reg == SDHCI_BLOCK_SIZE) {  in esdhc_writew_fixup()
287 				     int spec_reg, u8 value, u32 old_value)  in esdhc_writeb_fixup()  argument
292 	int shift = (spec_reg & 0x3) * 8;  in esdhc_writeb_fixup()
298 	if (spec_reg == SDHCI_POWER_CONTROL)  in esdhc_writeb_fixup()
304 	if (spec_reg == SDHCI_HOST_CONTROL) {  in esdhc_writeb_fixup()