Lines Matching refs:WREG32
727 WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_FULLY_TRUSTED); in goya_qman0_set_security()
729 WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_PARTLY_TRUSTED); in goya_qman0_set_security()
888 WREG32(mmMMU_LOG2_DDR_SIZE, ilog2(prop->dram_size)); in goya_late_init()
1099 WREG32(mmDMA_QM_0_PQ_BASE_LO + reg_off, lower_32_bits(bus_address)); in goya_init_dma_qman()
1100 WREG32(mmDMA_QM_0_PQ_BASE_HI + reg_off, upper_32_bits(bus_address)); in goya_init_dma_qman()
1102 WREG32(mmDMA_QM_0_PQ_SIZE + reg_off, ilog2(HL_QUEUE_LENGTH)); in goya_init_dma_qman()
1103 WREG32(mmDMA_QM_0_PQ_PI + reg_off, 0); in goya_init_dma_qman()
1104 WREG32(mmDMA_QM_0_PQ_CI + reg_off, 0); in goya_init_dma_qman()
1106 WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_dma_qman()
1107 WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_dma_qman()
1108 WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_dma_qman()
1109 WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_dma_qman()
1110 WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_dma_qman()
1111 WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_dma_qman()
1112 WREG32(mmDMA_QM_0_GLBL_ERR_WDATA + reg_off, in goya_init_dma_qman()
1116 WREG32(mmDMA_QM_0_PQ_CFG1 + reg_off, 0x00020002); in goya_init_dma_qman()
1117 WREG32(mmDMA_QM_0_CQ_CFG1 + reg_off, 0x00080008); in goya_init_dma_qman()
1120 WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_PARTLY_TRUSTED); in goya_init_dma_qman()
1122 WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_FULLY_TRUSTED); in goya_init_dma_qman()
1127 WREG32(mmDMA_QM_0_GLBL_ERR_CFG + reg_off, dma_err_cfg); in goya_init_dma_qman()
1128 WREG32(mmDMA_QM_0_GLBL_CFG0 + reg_off, QMAN_DMA_ENABLE); in goya_init_dma_qman()
1142 WREG32(mmDMA_CH_0_ERRMSG_ADDR_LO + reg_off, gic_base_lo); in goya_init_dma_ch()
1143 WREG32(mmDMA_CH_0_ERRMSG_ADDR_HI + reg_off, gic_base_hi); in goya_init_dma_ch()
1144 WREG32(mmDMA_CH_0_ERRMSG_WDATA + reg_off, in goya_init_dma_ch()
1153 WREG32(mmDMA_CH_0_WR_COMP_ADDR_HI + reg_off, upper_32_bits(sob_addr)); in goya_init_dma_ch()
1154 WREG32(mmDMA_CH_0_WR_COMP_WDATA + reg_off, 0x80000001); in goya_init_dma_ch()
1198 WREG32(mmDMA_QM_0_GLBL_CFG0, 0); in goya_disable_external_queues()
1199 WREG32(mmDMA_QM_1_GLBL_CFG0, 0); in goya_disable_external_queues()
1200 WREG32(mmDMA_QM_2_GLBL_CFG0, 0); in goya_disable_external_queues()
1201 WREG32(mmDMA_QM_3_GLBL_CFG0, 0); in goya_disable_external_queues()
1202 WREG32(mmDMA_QM_4_GLBL_CFG0, 0); in goya_disable_external_queues()
1213 WREG32(cfg_reg, 1 << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT); in goya_stop_queue()
1342 WREG32(mmCPU_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address)); in goya_init_cpu_queues()
1343 WREG32(mmCPU_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address)); in goya_init_cpu_queues()
1345 WREG32(mmCPU_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address)); in goya_init_cpu_queues()
1346 WREG32(mmCPU_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address)); in goya_init_cpu_queues()
1348 WREG32(mmCPU_CQ_BASE_ADDR_LOW, in goya_init_cpu_queues()
1350 WREG32(mmCPU_CQ_BASE_ADDR_HIGH, in goya_init_cpu_queues()
1353 WREG32(mmCPU_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES); in goya_init_cpu_queues()
1354 WREG32(mmCPU_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES); in goya_init_cpu_queues()
1355 WREG32(mmCPU_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE); in goya_init_cpu_queues()
1358 WREG32(mmCPU_EQ_CI, 0); in goya_init_cpu_queues()
1360 WREG32(mmCPU_IF_PF_PQ_PI, 0); in goya_init_cpu_queues()
1362 WREG32(mmCPU_PQ_INIT_STATUS, PQ_INIT_STATUS_READY_FOR_CP); in goya_init_cpu_queues()
1364 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_init_cpu_queues()
1394 WREG32(mmCPU_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1395 WREG32(mmCPU_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1396 WREG32(mmCPU_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1397 WREG32(mmCPU_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1399 WREG32(mmIC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1400 WREG32(mmIC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1401 WREG32(mmIC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1402 WREG32(mmIC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1404 WREG32(mmMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1405 WREG32(mmMC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1406 WREG32(mmMC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1407 WREG32(mmMC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1409 WREG32(mmPSOC_MME_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1410 WREG32(mmPSOC_MME_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1411 WREG32(mmPSOC_MME_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1412 WREG32(mmPSOC_MME_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1414 WREG32(mmPSOC_PCI_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1415 WREG32(mmPSOC_PCI_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1416 WREG32(mmPSOC_PCI_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1417 WREG32(mmPSOC_PCI_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1419 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1420 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1421 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1422 WREG32(mmPSOC_EMMC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1424 WREG32(mmTPC_PLL_DIV_SEL_0, 0x0); in goya_set_pll_refclk()
1425 WREG32(mmTPC_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()
1426 WREG32(mmTPC_PLL_DIV_SEL_2, 0x0); in goya_set_pll_refclk()
1427 WREG32(mmTPC_PLL_DIV_SEL_3, 0x0); in goya_set_pll_refclk()
1432 WREG32(mmPSOC_MME_PLL_CLK_RLX_0, 0x100010); in goya_disable_clk_rlx()
1433 WREG32(mmIC_PLL_CLK_RLX_0, 0x100010); in goya_disable_clk_rlx()
1457 WREG32(mmTPC0_CFG_FUNC_MBIST_PAT + tpc_offset, val & 0xFFFFF000); in _goya_tpc_mbist_workaround()
1459 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_0 + tpc_offset, 0x37FF); in _goya_tpc_mbist_workaround()
1460 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_1 + tpc_offset, 0x303F); in _goya_tpc_mbist_workaround()
1461 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_2 + tpc_offset, 0x71FF); in _goya_tpc_mbist_workaround()
1462 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_3 + tpc_offset, 0x71FF); in _goya_tpc_mbist_workaround()
1463 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_4 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1464 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_5 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1465 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_6 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1466 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_7 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1467 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_8 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1468 WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_9 + tpc_offset, 0x70FF); in _goya_tpc_mbist_workaround()
1496 WREG32(tpc_slm_offset + (slm_index << 2), 0); in _goya_tpc_mbist_workaround()
1552 WREG32(mmSRAM_Y0_X0_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1553 WREG32(mmSRAM_Y0_X1_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1554 WREG32(mmSRAM_Y0_X2_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1555 WREG32(mmSRAM_Y0_X3_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1556 WREG32(mmSRAM_Y0_X4_RTR_HBW_RD_RQ_L_ARB + offset, 0x302); in goya_init_golden_registers()
1558 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1559 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1560 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1561 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1562 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_L_ARB + offset, 0x204); in goya_init_golden_registers()
1565 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1566 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1567 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_E_ARB + offset, 0x206); in goya_init_golden_registers()
1568 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_E_ARB + offset, 0x207); in goya_init_golden_registers()
1569 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_E_ARB + offset, 0x207); in goya_init_golden_registers()
1571 WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_W_ARB + offset, 0x207); in goya_init_golden_registers()
1572 WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_W_ARB + offset, 0x207); in goya_init_golden_registers()
1573 WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1574 WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1575 WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_W_ARB + offset, 0x206); in goya_init_golden_registers()
1577 WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_E_ARB + offset, 0x101); in goya_init_golden_registers()
1578 WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_E_ARB + offset, 0x102); in goya_init_golden_registers()
1579 WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_E_ARB + offset, 0x103); in goya_init_golden_registers()
1580 WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_E_ARB + offset, 0x104); in goya_init_golden_registers()
1581 WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_E_ARB + offset, 0x105); in goya_init_golden_registers()
1583 WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_W_ARB + offset, 0x105); in goya_init_golden_registers()
1584 WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_W_ARB + offset, 0x104); in goya_init_golden_registers()
1585 WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_W_ARB + offset, 0x103); in goya_init_golden_registers()
1586 WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_W_ARB + offset, 0x102); in goya_init_golden_registers()
1587 WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_W_ARB + offset, 0x101); in goya_init_golden_registers()
1590 WREG32(mmMME_STORE_MAX_CREDIT, 0x21); in goya_init_golden_registers()
1591 WREG32(mmMME_AGU, 0x0f0f0f10); in goya_init_golden_registers()
1592 WREG32(mmMME_SEI_MASK, ~0x0); in goya_init_golden_registers()
1594 WREG32(mmMME6_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1595 WREG32(mmMME5_RTR_HBW_RD_RQ_N_ARB, 0x01040101); in goya_init_golden_registers()
1596 WREG32(mmMME4_RTR_HBW_RD_RQ_N_ARB, 0x01030101); in goya_init_golden_registers()
1597 WREG32(mmMME3_RTR_HBW_RD_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1598 WREG32(mmMME2_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1599 WREG32(mmMME1_RTR_HBW_RD_RQ_N_ARB, 0x07010701); in goya_init_golden_registers()
1600 WREG32(mmMME6_RTR_HBW_RD_RQ_S_ARB, 0x04010401); in goya_init_golden_registers()
1601 WREG32(mmMME5_RTR_HBW_RD_RQ_S_ARB, 0x04050401); in goya_init_golden_registers()
1602 WREG32(mmMME4_RTR_HBW_RD_RQ_S_ARB, 0x03070301); in goya_init_golden_registers()
1603 WREG32(mmMME3_RTR_HBW_RD_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1604 WREG32(mmMME2_RTR_HBW_RD_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1605 WREG32(mmMME1_RTR_HBW_RD_RQ_S_ARB, 0x01050105); in goya_init_golden_registers()
1606 WREG32(mmMME6_RTR_HBW_RD_RQ_W_ARB, 0x01010501); in goya_init_golden_registers()
1607 WREG32(mmMME5_RTR_HBW_RD_RQ_W_ARB, 0x01010501); in goya_init_golden_registers()
1608 WREG32(mmMME4_RTR_HBW_RD_RQ_W_ARB, 0x01040301); in goya_init_golden_registers()
1609 WREG32(mmMME3_RTR_HBW_RD_RQ_W_ARB, 0x01030401); in goya_init_golden_registers()
1610 WREG32(mmMME2_RTR_HBW_RD_RQ_W_ARB, 0x01040101); in goya_init_golden_registers()
1611 WREG32(mmMME1_RTR_HBW_RD_RQ_W_ARB, 0x01050101); in goya_init_golden_registers()
1612 WREG32(mmMME6_RTR_HBW_WR_RQ_N_ARB, 0x02020202); in goya_init_golden_registers()
1613 WREG32(mmMME5_RTR_HBW_WR_RQ_N_ARB, 0x01070101); in goya_init_golden_registers()
1614 WREG32(mmMME4_RTR_HBW_WR_RQ_N_ARB, 0x02020201); in goya_init_golden_registers()
1615 WREG32(mmMME3_RTR_HBW_WR_RQ_N_ARB, 0x07020701); in goya_init_golden_registers()
1616 WREG32(mmMME2_RTR_HBW_WR_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1617 WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1618 WREG32(mmMME6_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1619 WREG32(mmMME5_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1620 WREG32(mmMME4_RTR_HBW_WR_RQ_S_ARB, 0x07020701); in goya_init_golden_registers()
1621 WREG32(mmMME3_RTR_HBW_WR_RQ_S_ARB, 0x02020201); in goya_init_golden_registers()
1622 WREG32(mmMME2_RTR_HBW_WR_RQ_S_ARB, 0x01070101); in goya_init_golden_registers()
1623 WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01020102); in goya_init_golden_registers()
1624 WREG32(mmMME6_RTR_HBW_WR_RQ_W_ARB, 0x01020701); in goya_init_golden_registers()
1625 WREG32(mmMME5_RTR_HBW_WR_RQ_W_ARB, 0x01020701); in goya_init_golden_registers()
1626 WREG32(mmMME4_RTR_HBW_WR_RQ_W_ARB, 0x07020707); in goya_init_golden_registers()
1627 WREG32(mmMME3_RTR_HBW_WR_RQ_W_ARB, 0x01020201); in goya_init_golden_registers()
1628 WREG32(mmMME2_RTR_HBW_WR_RQ_W_ARB, 0x01070201); in goya_init_golden_registers()
1629 WREG32(mmMME1_RTR_HBW_WR_RQ_W_ARB, 0x01070201); in goya_init_golden_registers()
1630 WREG32(mmMME6_RTR_HBW_RD_RS_N_ARB, 0x01070102); in goya_init_golden_registers()
1631 WREG32(mmMME5_RTR_HBW_RD_RS_N_ARB, 0x01070102); in goya_init_golden_registers()
1632 WREG32(mmMME4_RTR_HBW_RD_RS_N_ARB, 0x01060102); in goya_init_golden_registers()
1633 WREG32(mmMME3_RTR_HBW_RD_RS_N_ARB, 0x01040102); in goya_init_golden_registers()
1634 WREG32(mmMME2_RTR_HBW_RD_RS_N_ARB, 0x01020102); in goya_init_golden_registers()
1635 WREG32(mmMME1_RTR_HBW_RD_RS_N_ARB, 0x01020107); in goya_init_golden_registers()
1636 WREG32(mmMME6_RTR_HBW_RD_RS_S_ARB, 0x01020106); in goya_init_golden_registers()
1637 WREG32(mmMME5_RTR_HBW_RD_RS_S_ARB, 0x01020102); in goya_init_golden_registers()
1638 WREG32(mmMME4_RTR_HBW_RD_RS_S_ARB, 0x01040102); in goya_init_golden_registers()
1639 WREG32(mmMME3_RTR_HBW_RD_RS_S_ARB, 0x01060102); in goya_init_golden_registers()
1640 WREG32(mmMME2_RTR_HBW_RD_RS_S_ARB, 0x01070102); in goya_init_golden_registers()
1641 WREG32(mmMME1_RTR_HBW_RD_RS_S_ARB, 0x01070102); in goya_init_golden_registers()
1642 WREG32(mmMME6_RTR_HBW_RD_RS_E_ARB, 0x01020702); in goya_init_golden_registers()
1643 WREG32(mmMME5_RTR_HBW_RD_RS_E_ARB, 0x01020702); in goya_init_golden_registers()
1644 WREG32(mmMME4_RTR_HBW_RD_RS_E_ARB, 0x01040602); in goya_init_golden_registers()
1645 WREG32(mmMME3_RTR_HBW_RD_RS_E_ARB, 0x01060402); in goya_init_golden_registers()
1646 WREG32(mmMME2_RTR_HBW_RD_RS_E_ARB, 0x01070202); in goya_init_golden_registers()
1647 WREG32(mmMME1_RTR_HBW_RD_RS_E_ARB, 0x01070102); in goya_init_golden_registers()
1648 WREG32(mmMME6_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1649 WREG32(mmMME5_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1650 WREG32(mmMME4_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1651 WREG32(mmMME3_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1652 WREG32(mmMME2_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1653 WREG32(mmMME1_RTR_HBW_RD_RS_W_ARB, 0x01060401); in goya_init_golden_registers()
1654 WREG32(mmMME6_RTR_HBW_WR_RS_N_ARB, 0x01050101); in goya_init_golden_registers()
1655 WREG32(mmMME5_RTR_HBW_WR_RS_N_ARB, 0x01040101); in goya_init_golden_registers()
1656 WREG32(mmMME4_RTR_HBW_WR_RS_N_ARB, 0x01030101); in goya_init_golden_registers()
1657 WREG32(mmMME3_RTR_HBW_WR_RS_N_ARB, 0x01020101); in goya_init_golden_registers()
1658 WREG32(mmMME2_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1659 WREG32(mmMME1_RTR_HBW_WR_RS_N_ARB, 0x01010107); in goya_init_golden_registers()
1660 WREG32(mmMME6_RTR_HBW_WR_RS_S_ARB, 0x01010107); in goya_init_golden_registers()
1661 WREG32(mmMME5_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1662 WREG32(mmMME4_RTR_HBW_WR_RS_S_ARB, 0x01020101); in goya_init_golden_registers()
1663 WREG32(mmMME3_RTR_HBW_WR_RS_S_ARB, 0x01030101); in goya_init_golden_registers()
1664 WREG32(mmMME2_RTR_HBW_WR_RS_S_ARB, 0x01040101); in goya_init_golden_registers()
1665 WREG32(mmMME1_RTR_HBW_WR_RS_S_ARB, 0x01050101); in goya_init_golden_registers()
1666 WREG32(mmMME6_RTR_HBW_WR_RS_E_ARB, 0x01010501); in goya_init_golden_registers()
1667 WREG32(mmMME5_RTR_HBW_WR_RS_E_ARB, 0x01010501); in goya_init_golden_registers()
1668 WREG32(mmMME4_RTR_HBW_WR_RS_E_ARB, 0x01040301); in goya_init_golden_registers()
1669 WREG32(mmMME3_RTR_HBW_WR_RS_E_ARB, 0x01030401); in goya_init_golden_registers()
1670 WREG32(mmMME2_RTR_HBW_WR_RS_E_ARB, 0x01040101); in goya_init_golden_registers()
1671 WREG32(mmMME1_RTR_HBW_WR_RS_E_ARB, 0x01050101); in goya_init_golden_registers()
1672 WREG32(mmMME6_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1673 WREG32(mmMME5_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1674 WREG32(mmMME4_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1675 WREG32(mmMME3_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1676 WREG32(mmMME2_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1677 WREG32(mmMME1_RTR_HBW_WR_RS_W_ARB, 0x01010101); in goya_init_golden_registers()
1679 WREG32(mmTPC1_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1680 WREG32(mmTPC1_RTR_HBW_RD_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1681 WREG32(mmTPC1_RTR_HBW_RD_RQ_E_ARB, 0x01060101); in goya_init_golden_registers()
1682 WREG32(mmTPC1_RTR_HBW_WR_RQ_N_ARB, 0x02020102); in goya_init_golden_registers()
1683 WREG32(mmTPC1_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1684 WREG32(mmTPC1_RTR_HBW_WR_RQ_E_ARB, 0x02070202); in goya_init_golden_registers()
1685 WREG32(mmTPC1_RTR_HBW_RD_RS_N_ARB, 0x01020201); in goya_init_golden_registers()
1686 WREG32(mmTPC1_RTR_HBW_RD_RS_S_ARB, 0x01070201); in goya_init_golden_registers()
1687 WREG32(mmTPC1_RTR_HBW_RD_RS_W_ARB, 0x01070202); in goya_init_golden_registers()
1688 WREG32(mmTPC1_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1689 WREG32(mmTPC1_RTR_HBW_WR_RS_S_ARB, 0x01050101); in goya_init_golden_registers()
1690 WREG32(mmTPC1_RTR_HBW_WR_RS_W_ARB, 0x01050101); in goya_init_golden_registers()
1692 WREG32(mmTPC2_RTR_HBW_RD_RQ_N_ARB, 0x01020101); in goya_init_golden_registers()
1693 WREG32(mmTPC2_RTR_HBW_RD_RQ_S_ARB, 0x01050101); in goya_init_golden_registers()
1694 WREG32(mmTPC2_RTR_HBW_RD_RQ_E_ARB, 0x01010201); in goya_init_golden_registers()
1695 WREG32(mmTPC2_RTR_HBW_WR_RQ_N_ARB, 0x02040102); in goya_init_golden_registers()
1696 WREG32(mmTPC2_RTR_HBW_WR_RQ_S_ARB, 0x01050101); in goya_init_golden_registers()
1697 WREG32(mmTPC2_RTR_HBW_WR_RQ_E_ARB, 0x02060202); in goya_init_golden_registers()
1698 WREG32(mmTPC2_RTR_HBW_RD_RS_N_ARB, 0x01020201); in goya_init_golden_registers()
1699 WREG32(mmTPC2_RTR_HBW_RD_RS_S_ARB, 0x01070201); in goya_init_golden_registers()
1700 WREG32(mmTPC2_RTR_HBW_RD_RS_W_ARB, 0x01070202); in goya_init_golden_registers()
1701 WREG32(mmTPC2_RTR_HBW_WR_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1702 WREG32(mmTPC2_RTR_HBW_WR_RS_S_ARB, 0x01040101); in goya_init_golden_registers()
1703 WREG32(mmTPC2_RTR_HBW_WR_RS_W_ARB, 0x01040101); in goya_init_golden_registers()
1705 WREG32(mmTPC3_RTR_HBW_RD_RQ_N_ARB, 0x01030101); in goya_init_golden_registers()
1706 WREG32(mmTPC3_RTR_HBW_RD_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1707 WREG32(mmTPC3_RTR_HBW_RD_RQ_E_ARB, 0x01040301); in goya_init_golden_registers()
1708 WREG32(mmTPC3_RTR_HBW_WR_RQ_N_ARB, 0x02060102); in goya_init_golden_registers()
1709 WREG32(mmTPC3_RTR_HBW_WR_RQ_S_ARB, 0x01040101); in goya_init_golden_registers()
1710 WREG32(mmTPC3_RTR_HBW_WR_RQ_E_ARB, 0x01040301); in goya_init_golden_registers()
1711 WREG32(mmTPC3_RTR_HBW_RD_RS_N_ARB, 0x01040201); in goya_init_golden_registers()
1712 WREG32(mmTPC3_RTR_HBW_RD_RS_S_ARB, 0x01060201); in goya_init_golden_registers()
1713 WREG32(mmTPC3_RTR_HBW_RD_RS_W_ARB, 0x01060402); in goya_init_golden_registers()
1714 WREG32(mmTPC3_RTR_HBW_WR_RS_N_ARB, 0x01020101); in goya_init_golden_registers()
1715 WREG32(mmTPC3_RTR_HBW_WR_RS_S_ARB, 0x01030101); in goya_init_golden_registers()
1716 WREG32(mmTPC3_RTR_HBW_WR_RS_W_ARB, 0x01030401); in goya_init_golden_registers()
1718 WREG32(mmTPC4_RTR_HBW_RD_RQ_N_ARB, 0x01040101); in goya_init_golden_registers()
1719 WREG32(mmTPC4_RTR_HBW_RD_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1720 WREG32(mmTPC4_RTR_HBW_RD_RQ_E_ARB, 0x01030401); in goya_init_golden_registers()
1721 WREG32(mmTPC4_RTR_HBW_WR_RQ_N_ARB, 0x02070102); in goya_init_golden_registers()
1722 WREG32(mmTPC4_RTR_HBW_WR_RQ_S_ARB, 0x01030101); in goya_init_golden_registers()
1723 WREG32(mmTPC4_RTR_HBW_WR_RQ_E_ARB, 0x02060702); in goya_init_golden_registers()
1724 WREG32(mmTPC4_RTR_HBW_RD_RS_N_ARB, 0x01060201); in goya_init_golden_registers()
1725 WREG32(mmTPC4_RTR_HBW_RD_RS_S_ARB, 0x01040201); in goya_init_golden_registers()
1726 WREG32(mmTPC4_RTR_HBW_RD_RS_W_ARB, 0x01040602); in goya_init_golden_registers()
1727 WREG32(mmTPC4_RTR_HBW_WR_RS_N_ARB, 0x01030101); in goya_init_golden_registers()
1728 WREG32(mmTPC4_RTR_HBW_WR_RS_S_ARB, 0x01020101); in goya_init_golden_registers()
1729 WREG32(mmTPC4_RTR_HBW_WR_RS_W_ARB, 0x01040301); in goya_init_golden_registers()
1731 WREG32(mmTPC5_RTR_HBW_RD_RQ_N_ARB, 0x01050101); in goya_init_golden_registers()
1732 WREG32(mmTPC5_RTR_HBW_RD_RQ_S_ARB, 0x01020101); in goya_init_golden_registers()
1733 WREG32(mmTPC5_RTR_HBW_RD_RQ_E_ARB, 0x01200501); in goya_init_golden_registers()
1734 WREG32(mmTPC5_RTR_HBW_WR_RQ_N_ARB, 0x02070102); in goya_init_golden_registers()
1735 WREG32(mmTPC5_RTR_HBW_WR_RQ_S_ARB, 0x01020101); in goya_init_golden_registers()
1736 WREG32(mmTPC5_RTR_HBW_WR_RQ_E_ARB, 0x02020602); in goya_init_golden_registers()
1737 WREG32(mmTPC5_RTR_HBW_RD_RS_N_ARB, 0x01070201); in goya_init_golden_registers()
1738 WREG32(mmTPC5_RTR_HBW_RD_RS_S_ARB, 0x01020201); in goya_init_golden_registers()
1739 WREG32(mmTPC5_RTR_HBW_RD_RS_W_ARB, 0x01020702); in goya_init_golden_registers()
1740 WREG32(mmTPC5_RTR_HBW_WR_RS_N_ARB, 0x01040101); in goya_init_golden_registers()
1741 WREG32(mmTPC5_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1742 WREG32(mmTPC5_RTR_HBW_WR_RS_W_ARB, 0x01010501); in goya_init_golden_registers()
1744 WREG32(mmTPC6_RTR_HBW_RD_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1745 WREG32(mmTPC6_RTR_HBW_RD_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1746 WREG32(mmTPC6_RTR_HBW_RD_RQ_E_ARB, 0x01010601); in goya_init_golden_registers()
1747 WREG32(mmTPC6_RTR_HBW_WR_RQ_N_ARB, 0x01010101); in goya_init_golden_registers()
1748 WREG32(mmTPC6_RTR_HBW_WR_RQ_S_ARB, 0x01010101); in goya_init_golden_registers()
1749 WREG32(mmTPC6_RTR_HBW_WR_RQ_E_ARB, 0x02020702); in goya_init_golden_registers()
1750 WREG32(mmTPC6_RTR_HBW_RD_RS_N_ARB, 0x01010101); in goya_init_golden_registers()
1751 WREG32(mmTPC6_RTR_HBW_RD_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1752 WREG32(mmTPC6_RTR_HBW_RD_RS_W_ARB, 0x01020702); in goya_init_golden_registers()
1753 WREG32(mmTPC6_RTR_HBW_WR_RS_N_ARB, 0x01050101); in goya_init_golden_registers()
1754 WREG32(mmTPC6_RTR_HBW_WR_RS_S_ARB, 0x01010101); in goya_init_golden_registers()
1755 WREG32(mmTPC6_RTR_HBW_WR_RS_W_ARB, 0x01010501); in goya_init_golden_registers()
1758 WREG32(mmMME1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1759 WREG32(mmMME2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1760 WREG32(mmMME3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1761 WREG32(mmMME4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1762 WREG32(mmMME5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1763 WREG32(mmMME6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1765 WREG32(mmTPC0_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1766 WREG32(mmTPC1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1767 WREG32(mmTPC2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1768 WREG32(mmTPC3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1769 WREG32(mmTPC4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1770 WREG32(mmTPC5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1771 WREG32(mmTPC6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1772 WREG32(mmTPC7_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1774 WREG32(mmPCI_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1775 WREG32(mmDMA_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7); in goya_init_golden_registers()
1779 WREG32(mmMME1_RTR_SCRAMB_EN + offset, in goya_init_golden_registers()
1781 WREG32(mmMME1_RTR_NON_LIN_SCRAMB + offset, in goya_init_golden_registers()
1790 WREG32(mmTPC0_CFG_TPC_INTR_MASK + offset, tpc_intr_mask); in goya_init_golden_registers()
1792 WREG32(mmTPC0_NRTR_SCRAMB_EN + offset, in goya_init_golden_registers()
1794 WREG32(mmTPC0_NRTR_NON_LIN_SCRAMB + offset, in goya_init_golden_registers()
1801 WREG32(mmDMA_NRTR_SCRAMB_EN, 1 << DMA_NRTR_SCRAMB_EN_VAL_SHIFT); in goya_init_golden_registers()
1802 WREG32(mmDMA_NRTR_NON_LIN_SCRAMB, in goya_init_golden_registers()
1805 WREG32(mmPCI_NRTR_SCRAMB_EN, 1 << PCI_NRTR_SCRAMB_EN_VAL_SHIFT); in goya_init_golden_registers()
1806 WREG32(mmPCI_NRTR_NON_LIN_SCRAMB, in goya_init_golden_registers()
1816 WREG32(mmDMA_CH_1_CFG0, 0x0fff00F0); in goya_init_golden_registers()
1818 WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020); in goya_init_golden_registers()
1843 WREG32(mmMME_QM_PQ_BASE_LO, lower_32_bits(qman_base_addr)); in goya_init_mme_qman()
1844 WREG32(mmMME_QM_PQ_BASE_HI, upper_32_bits(qman_base_addr)); in goya_init_mme_qman()
1845 WREG32(mmMME_QM_PQ_SIZE, ilog2(MME_QMAN_LENGTH)); in goya_init_mme_qman()
1846 WREG32(mmMME_QM_PQ_PI, 0); in goya_init_mme_qman()
1847 WREG32(mmMME_QM_PQ_CI, 0); in goya_init_mme_qman()
1848 WREG32(mmMME_QM_CP_LDMA_SRC_BASE_LO_OFFSET, 0x10C0); in goya_init_mme_qman()
1849 WREG32(mmMME_QM_CP_LDMA_SRC_BASE_HI_OFFSET, 0x10C4); in goya_init_mme_qman()
1850 WREG32(mmMME_QM_CP_LDMA_TSIZE_OFFSET, 0x10C8); in goya_init_mme_qman()
1851 WREG32(mmMME_QM_CP_LDMA_COMMIT_OFFSET, 0x10CC); in goya_init_mme_qman()
1853 WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_LO, mtr_base_lo); in goya_init_mme_qman()
1854 WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_HI, mtr_base_hi); in goya_init_mme_qman()
1855 WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_LO, so_base_lo); in goya_init_mme_qman()
1856 WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_HI, so_base_hi); in goya_init_mme_qman()
1859 WREG32(mmMME_QM_CQ_CFG1, 0x00080008); in goya_init_mme_qman()
1861 WREG32(mmMME_QM_GLBL_ERR_ADDR_LO, gic_base_lo); in goya_init_mme_qman()
1862 WREG32(mmMME_QM_GLBL_ERR_ADDR_HI, gic_base_hi); in goya_init_mme_qman()
1864 WREG32(mmMME_QM_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_QM); in goya_init_mme_qman()
1866 WREG32(mmMME_QM_GLBL_ERR_CFG, QMAN_MME_ERR_MSG_EN); in goya_init_mme_qman()
1868 WREG32(mmMME_QM_GLBL_PROT, QMAN_MME_ERR_PROT); in goya_init_mme_qman()
1870 WREG32(mmMME_QM_GLBL_CFG0, QMAN_MME_ENABLE); in goya_init_mme_qman()
1889 WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_LO, mtr_base_lo); in goya_init_mme_cmdq()
1890 WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_HI, mtr_base_hi); in goya_init_mme_cmdq()
1891 WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_LO, so_base_lo); in goya_init_mme_cmdq()
1892 WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_HI, so_base_hi); in goya_init_mme_cmdq()
1895 WREG32(mmMME_CMDQ_CQ_CFG1, 0x00140014); in goya_init_mme_cmdq()
1897 WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_LO, gic_base_lo); in goya_init_mme_cmdq()
1898 WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_HI, gic_base_hi); in goya_init_mme_cmdq()
1900 WREG32(mmMME_CMDQ_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_CMDQ); in goya_init_mme_cmdq()
1902 WREG32(mmMME_CMDQ_GLBL_ERR_CFG, CMDQ_MME_ERR_MSG_EN); in goya_init_mme_cmdq()
1904 WREG32(mmMME_CMDQ_GLBL_PROT, CMDQ_MME_ERR_PROT); in goya_init_mme_cmdq()
1906 WREG32(mmMME_CMDQ_GLBL_CFG0, CMDQ_MME_ENABLE); in goya_init_mme_cmdq()
1920 WREG32(mmMME_SM_BASE_ADDRESS_LOW, so_base_lo); in goya_init_mme_qmans()
1921 WREG32(mmMME_SM_BASE_ADDRESS_HIGH, so_base_hi); in goya_init_mme_qmans()
1949 WREG32(mmTPC0_QM_PQ_BASE_LO + reg_off, lower_32_bits(qman_base_addr)); in goya_init_tpc_qman()
1950 WREG32(mmTPC0_QM_PQ_BASE_HI + reg_off, upper_32_bits(qman_base_addr)); in goya_init_tpc_qman()
1951 WREG32(mmTPC0_QM_PQ_SIZE + reg_off, ilog2(TPC_QMAN_LENGTH)); in goya_init_tpc_qman()
1952 WREG32(mmTPC0_QM_PQ_PI + reg_off, 0); in goya_init_tpc_qman()
1953 WREG32(mmTPC0_QM_PQ_CI + reg_off, 0); in goya_init_tpc_qman()
1954 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET + reg_off, 0x10C0); in goya_init_tpc_qman()
1955 WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_HI_OFFSET + reg_off, 0x10C4); in goya_init_tpc_qman()
1956 WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET + reg_off, 0x10C8); in goya_init_tpc_qman()
1957 WREG32(mmTPC0_QM_CP_LDMA_COMMIT_OFFSET + reg_off, 0x10CC); in goya_init_tpc_qman()
1959 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_tpc_qman()
1960 WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_tpc_qman()
1961 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_tpc_qman()
1962 WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_tpc_qman()
1964 WREG32(mmTPC0_QM_CQ_CFG1 + reg_off, 0x00080008); in goya_init_tpc_qman()
1966 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_tpc_qman()
1967 WREG32(mmTPC0_QM_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_tpc_qman()
1969 WREG32(mmTPC0_QM_GLBL_ERR_WDATA + reg_off, in goya_init_tpc_qman()
1972 WREG32(mmTPC0_QM_GLBL_ERR_CFG + reg_off, QMAN_TPC_ERR_MSG_EN); in goya_init_tpc_qman()
1974 WREG32(mmTPC0_QM_GLBL_PROT + reg_off, QMAN_TPC_ERR_PROT); in goya_init_tpc_qman()
1976 WREG32(mmTPC0_QM_GLBL_CFG0 + reg_off, QMAN_TPC_ENABLE); in goya_init_tpc_qman()
1996 WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo); in goya_init_tpc_cmdq()
1997 WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi); in goya_init_tpc_cmdq()
1998 WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo); in goya_init_tpc_cmdq()
1999 WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi); in goya_init_tpc_cmdq()
2001 WREG32(mmTPC0_CMDQ_CQ_CFG1 + reg_off, 0x00140014); in goya_init_tpc_cmdq()
2003 WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo); in goya_init_tpc_cmdq()
2004 WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi); in goya_init_tpc_cmdq()
2006 WREG32(mmTPC0_CMDQ_GLBL_ERR_WDATA + reg_off, in goya_init_tpc_cmdq()
2009 WREG32(mmTPC0_CMDQ_GLBL_ERR_CFG + reg_off, CMDQ_TPC_ERR_MSG_EN); in goya_init_tpc_cmdq()
2011 WREG32(mmTPC0_CMDQ_GLBL_PROT + reg_off, CMDQ_TPC_ERR_PROT); in goya_init_tpc_cmdq()
2013 WREG32(mmTPC0_CMDQ_GLBL_CFG0 + reg_off, CMDQ_TPC_ENABLE); in goya_init_tpc_cmdq()
2031 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_LOW + i * cfg_off, in goya_init_tpc_qmans()
2033 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + i * cfg_off, in goya_init_tpc_qmans()
2065 WREG32(mmMME_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2066 WREG32(mmMME_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2072 WREG32(mmTPC0_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2073 WREG32(mmTPC0_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2075 WREG32(mmTPC1_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2076 WREG32(mmTPC1_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2078 WREG32(mmTPC2_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2079 WREG32(mmTPC2_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2081 WREG32(mmTPC3_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2082 WREG32(mmTPC3_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2084 WREG32(mmTPC4_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2085 WREG32(mmTPC4_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2087 WREG32(mmTPC5_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2088 WREG32(mmTPC5_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2090 WREG32(mmTPC6_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2091 WREG32(mmTPC6_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2093 WREG32(mmTPC7_QM_GLBL_CFG0, 0); in goya_disable_internal_queues()
2094 WREG32(mmTPC7_CMDQ_GLBL_CFG0, 0); in goya_disable_internal_queues()
2313 WREG32(mmDMA_QM_0_GLBL_CFG1, 1 << DMA_QM_0_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2314 WREG32(mmDMA_QM_1_GLBL_CFG1, 1 << DMA_QM_1_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2315 WREG32(mmDMA_QM_2_GLBL_CFG1, 1 << DMA_QM_2_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2316 WREG32(mmDMA_QM_3_GLBL_CFG1, 1 << DMA_QM_3_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2317 WREG32(mmDMA_QM_4_GLBL_CFG1, 1 << DMA_QM_4_GLBL_CFG1_DMA_STOP_SHIFT); in goya_dma_stall()
2327 WREG32(mmTPC0_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2328 WREG32(mmTPC1_CFG_TPC_STALL, 1 << TPC1_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2329 WREG32(mmTPC2_CFG_TPC_STALL, 1 << TPC2_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2330 WREG32(mmTPC3_CFG_TPC_STALL, 1 << TPC3_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2331 WREG32(mmTPC4_CFG_TPC_STALL, 1 << TPC4_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2332 WREG32(mmTPC5_CFG_TPC_STALL, 1 << TPC5_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2333 WREG32(mmTPC6_CFG_TPC_STALL, 1 << TPC6_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2334 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC7_CFG_TPC_STALL_V_SHIFT); in goya_tpc_stall()
2344 WREG32(mmMME_STALL, 0xFFFFFFFF); in goya_mme_stall()
2438 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_enable_timestamp()
2441 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in goya_enable_timestamp()
2442 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in goya_enable_timestamp()
2445 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in goya_enable_timestamp()
2451 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in goya_disable_timestamp()
2639 WREG32(MMU_HOP0_PA43_12, phys_addr >> MMU_HOP0_PA43_12_SHIFT); in goya_mmu_update_asid_hop0_addr()
2640 WREG32(MMU_HOP0_PA49_44, phys_addr >> MMU_HOP0_PA49_44_SHIFT); in goya_mmu_update_asid_hop0_addr()
2641 WREG32(MMU_ASID_BUSY, 0x80000000 | asid); in goya_mmu_update_asid_hop0_addr()
2690 WREG32(mmSTLB_CACHE_INV_BASE_39_8, in goya_mmu_init()
2692 WREG32(mmSTLB_CACHE_INV_BASE_49_40, MMU_CACHE_MNG_ADDR >> 40); in goya_mmu_init()
2700 WREG32(mmMMU_MMU_ENABLE, 1); in goya_mmu_init()
2701 WREG32(mmMMU_SPI_MASK, 0xF); in goya_mmu_init()
2731 WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY); in goya_hw_init()
2802 WREG32(mmPSOC_GLOBAL_CONF_UBOOT_MAGIC, KMD_MSG_GOTO_WFE); in goya_hw_fini()
2803 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_hw_fini()
2812 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, RESET_ALL); in goya_hw_fini()
2817 WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, DMA_MME_TPC_RESET); in goya_hw_fini()
2839 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_hw_fini()
2845 WREG32(mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START, in goya_hw_fini()
2848 WREG32(mmPSOC_GLOBAL_CONF_SW_BTM_FSM, in goya_hw_fini()
2969 WREG32(db_reg_offset, db_value); in goya_ring_doorbell()
2974 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_ring_doorbell()
4174 WREG32(mmCPU_EQ_CI, val); in goya_update_eq_ci()
4193 WREG32(mmSYNC_MNGR_SOB_OBJ_0 + i, 0); in goya_clear_sm_regs()
4196 WREG32(mmSYNC_MNGR_MON_STATUS_0 + i, 0); in goya_clear_sm_regs()
4432 WREG32(mmDMA_MACRO_RAZWI_LBW_WT_VLD, 0); in goya_print_razwi_info()
4437 WREG32(mmDMA_MACRO_RAZWI_LBW_RD_VLD, 0); in goya_print_razwi_info()
4442 WREG32(mmDMA_MACRO_RAZWI_HBW_WT_VLD, 0); in goya_print_razwi_info()
4447 WREG32(mmDMA_MACRO_RAZWI_HBW_RD_VLD, 0); in goya_print_razwi_info()
4469 WREG32(mmMMU_PAGE_ERROR_CAPTURE, 0); in goya_print_mmu_error_info()
4850 WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO, lower_32_bits(sob_addr)); in goya_context_switch()
4855 WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO + channel_off * dma_id, in goya_context_switch()
4859 WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020); in goya_context_switch()
4944 WREG32(mmCPU_IF_ARUSER_OVR_EN, 0x7FF); in goya_mmu_add_mappings_for_device_cpu()
4945 WREG32(mmCPU_IF_AWUSER_OVR_EN, 0x7FF); in goya_mmu_add_mappings_for_device_cpu()
4986 WREG32(mmCPU_IF_ARUSER_OVR_EN, 0); in goya_mmu_remove_device_cpu_mappings()
4987 WREG32(mmCPU_IF_AWUSER_OVR_EN, 0); in goya_mmu_remove_device_cpu_mappings()
5056 WREG32(mmSTLB_INV_ALL_START, 1); in goya_mmu_invalidate_cache()
5330 WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR, in goya_enable_events_from_fw()