80 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_enable()  local
82 	irqd->enable_hwirq[hwirq] = true;  in pmic_irq_enable()
89 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_disable()  local
91 	irqd->enable_hwirq[hwirq] = false;  in pmic_irq_disable()
105 	struct pmic_irq_data *irqd = chip->irq_data;  in pmic_irq_sync_unlock()  local
107 	for (i = 0; i < irqd->num_pmic_irqs; i++) {  in pmic_irq_sync_unlock()
108 		if (irqd->enable_hwirq[i] == irqd->cache_hwirq[i])  in pmic_irq_sync_unlock()
113 		while ((top_gp + 1) < irqd->num_top &&  in pmic_irq_sync_unlock()
114 		       i >= irqd->pmic_ints[top_gp + 1].hwirq_base)  in pmic_irq_sync_unlock()
118 		gp_offset = i - irqd->pmic_ints[top_gp].hwirq_base;  in pmic_irq_sync_unlock()
121 		en_reg = irqd->pmic_ints[top_gp].en_reg +  in pmic_irq_sync_unlock()
122 			 (irqd->pmic_ints[top_gp].en_reg_shift * int_regs);  in pmic_irq_sync_unlock()
125 				   irqd->enable_hwirq[i] << shift);  in pmic_irq_sync_unlock()
127 		irqd->cache_hwirq[i] = irqd->enable_hwirq[i];  in pmic_irq_sync_unlock()
147 	struct pmic_irq_data *irqd = chip->irq_data;  in mt6358_irq_sp_handler()  local
149 	for (i = 0; i < irqd->pmic_ints[top_gp].num_int_regs; i++) {  in mt6358_irq_sp_handler()
150 		sta_reg = irqd->pmic_ints[top_gp].sta_reg +  in mt6358_irq_sp_handler()
151 			irqd->pmic_ints[top_gp].sta_reg_shift * i;  in mt6358_irq_sp_handler()
167 			hwirq = irqd->pmic_ints[top_gp].hwirq_base +  in mt6358_irq_sp_handler()
184 	struct pmic_irq_data *irqd = chip->irq_data;  in mt6358_irq_handler()  local
189 			  irqd->top_int_status_reg,  in mt6358_irq_handler()
197 	for (i = 0; i < irqd->num_top; i++) {  in mt6358_irq_handler()
198 		bit = BIT(irqd->pmic_ints[i].top_offset);  in mt6358_irq_handler()
231 	struct pmic_irq_data *irqd;  in mt6358_irq_init()  local
253 	irqd = chip->irq_data;  in mt6358_irq_init()
254 	irqd->enable_hwirq = devm_kcalloc(chip->dev,  in mt6358_irq_init()
255 					  irqd->num_pmic_irqs,  in mt6358_irq_init()
256 					  sizeof(*irqd->enable_hwirq),  in mt6358_irq_init()
258 	if (!irqd->enable_hwirq)  in mt6358_irq_init()
261 	irqd->cache_hwirq = devm_kcalloc(chip->dev,  in mt6358_irq_init()
262 					 irqd->num_pmic_irqs,  in mt6358_irq_init()
263 					 sizeof(*irqd->cache_hwirq),  in mt6358_irq_init()
265 	if (!irqd->cache_hwirq)  in mt6358_irq_init()
269 	for (i = 0; i < irqd->num_top; i++) {  in mt6358_irq_init()
270 		for (j = 0; j < irqd->pmic_ints[i].num_int_regs; j++)  in mt6358_irq_init()
272 				     irqd->pmic_ints[i].en_reg +  in mt6358_irq_init()
273 				     irqd->pmic_ints[i].en_reg_shift * j, 0);  in mt6358_irq_init()
277 						 irqd->num_pmic_irqs,  in mt6358_irq_init()