456 					    unsigned long target_volt)  in exynos5_dmc_align_target_voltage()  argument
460 	if (dmc->curr_volt <= target_volt)  in exynos5_dmc_align_target_voltage()
463 	ret = regulator_set_voltage(dmc->vdd_mif, target_volt,  in exynos5_dmc_align_target_voltage()
464 				    target_volt);  in exynos5_dmc_align_target_voltage()
466 		dmc->curr_volt = target_volt;  in exynos5_dmc_align_target_voltage()
482 					    unsigned long target_volt)  in exynos5_dmc_align_bypass_voltage()  argument
486 	if (dmc->curr_volt >= target_volt)  in exynos5_dmc_align_bypass_voltage()
489 	ret = regulator_set_voltage(dmc->vdd_mif, target_volt,  in exynos5_dmc_align_bypass_voltage()
490 				    target_volt);  in exynos5_dmc_align_bypass_voltage()
492 		dmc->curr_volt = target_volt;  in exynos5_dmc_align_bypass_voltage()
531 					   unsigned long target_volt)  in exynos5_dmc_switch_to_bypass_configuration()  argument
540 	ret = exynos5_dmc_align_bypass_voltage(dmc, target_volt);  in exynos5_dmc_switch_to_bypass_configuration()
585 				 unsigned long target_volt)  in exynos5_dmc_change_freq_and_volt()  argument
590 							 target_volt);  in exynos5_dmc_change_freq_and_volt()
627 	ret = exynos5_dmc_align_target_voltage(dmc, target_volt);  in exynos5_dmc_change_freq_and_volt()
655 				     unsigned long *target_volt, u32 flags)  in exynos5_dmc_get_volt_freq()  argument
664 	*target_volt = dev_pm_opp_get_voltage(opp);  in exynos5_dmc_get_volt_freq()
687 	unsigned long target_volt = 0;  in exynos5_dmc_target()  local
690 	ret = exynos5_dmc_get_volt_freq(dmc, freq, &target_rate, &target_volt,  in exynos5_dmc_target()
701 	ret = exynos5_dmc_change_freq_and_volt(dmc, target_rate, target_volt);  in exynos5_dmc_target()
1257 	unsigned long target_volt = 0;  in exynos5_dmc_init_clks()  local
1297 					&target_volt, 0);  in exynos5_dmc_init_clks()
1301 	dmc->curr_volt = target_volt;  in exynos5_dmc_init_clks()