528 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in cp_write()  function
537 	return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);  in cp_write_and_or()
941 		cp_write(sd, reg->reg & 0xff, val);  in adv7842_s_register()
999 	cp_write(sd, 0x26, 0x00);  in configure_predefined_video_timings()
1000 	cp_write(sd, 0x27, 0x00);  in configure_predefined_video_timings()
1001 	cp_write(sd, 0x28, 0x00);  in configure_predefined_video_timings()
1002 	cp_write(sd, 0x29, 0x00);  in configure_predefined_video_timings()
1003 	cp_write(sd, 0x8f, 0x40);  in configure_predefined_video_timings()
1004 	cp_write(sd, 0x90, 0x00);  in configure_predefined_video_timings()
1005 	cp_write(sd, 0xa5, 0x00);  in configure_predefined_video_timings()
1006 	cp_write(sd, 0xa6, 0x00);  in configure_predefined_video_timings()
1007 	cp_write(sd, 0xa7, 0x00);  in configure_predefined_video_timings()
1008 	cp_write(sd, 0xab, 0x00);  in configure_predefined_video_timings()
1009 	cp_write(sd, 0xac, 0x00);  in configure_predefined_video_timings()
1076 		cp_write(sd, 0x26, (cp_start_sav >> 8) & 0xf);  in configure_custom_video_timings()
1077 		cp_write(sd, 0x27, (cp_start_sav & 0xff));  in configure_custom_video_timings()
1078 		cp_write(sd, 0x28, (cp_start_eav >> 8) & 0xf);  in configure_custom_video_timings()
1079 		cp_write(sd, 0x29, (cp_start_eav & 0xff));  in configure_custom_video_timings()
1082 		cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);  in configure_custom_video_timings()
1083 		cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |  in configure_custom_video_timings()
1085 		cp_write(sd, 0xa7, cp_end_vbi & 0xff);  in configure_custom_video_timings()
1099 	cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);  in configure_custom_video_timings()
1100 	cp_write(sd, 0x90, ch1_fr_ll & 0xff);  in configure_custom_video_timings()
1101 	cp_write(sd, 0xab, (height >> 4) & 0xff);  in configure_custom_video_timings()
1102 	cp_write(sd, 0xac, (height & 0x0f) << 4);  in configure_custom_video_timings()
1271 		cp_write(sd, 0x3c, ctrl->val);  in adv7842_s_ctrl()
1276 		cp_write(sd, 0x3a, ctrl->val);  in adv7842_s_ctrl()
1281 		cp_write(sd, 0x3b, ctrl->val);  in adv7842_s_ctrl()
1286 		cp_write(sd, 0x3d, ctrl->val);  in adv7842_s_ctrl()
1320 		cp_write(sd, 0xc1, R);  in adv7842_s_ctrl()
1321 		cp_write(sd, 0xc0, G);  in adv7842_s_ctrl()
1322 		cp_write(sd, 0xc2, B);  in adv7842_s_ctrl()
1673 	cp_write(sd, 0x91, bt->interlaced ? 0x40 : 0x00);  in adv7842_s_dv_timings()
1860 		cp_write(sd, 0x73, 0x10);  in select_input()
1861 		cp_write(sd, 0x74, 0x04);  in select_input()
1862 		cp_write(sd, 0x75, 0x01);  in select_input()
1863 		cp_write(sd, 0x76, 0x00);  in select_input()
1865 		cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */  in select_input()
1866 		cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */  in select_input()
1867 		cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */  in select_input()
1912 		cp_write(sd, 0x73, 0x10);  in select_input()
1913 		cp_write(sd, 0x74, 0x04);  in select_input()
1914 		cp_write(sd, 0x75, 0x01);  in select_input()
1915 		cp_write(sd, 0x76, 0x00);  in select_input()
1922 		cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */  in select_input()
1925 		cp_write(sd, 0xc3, 0x33); /* Component mode */  in select_input()
3033 	cp_write(sd, 0x69, 0x14);   /* Enable CP CSC */  in adv7842_core_init()
3035 	cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */  in adv7842_core_init()