Lines Matching refs:S5H1411_I2C_TOP_ADDR
50 { S5H1411_I2C_TOP_ADDR, 0x00, 0x0071, },
51 { S5H1411_I2C_TOP_ADDR, 0x08, 0x0047, },
52 { S5H1411_I2C_TOP_ADDR, 0x1c, 0x0400, },
53 { S5H1411_I2C_TOP_ADDR, 0x1e, 0x0370, },
54 { S5H1411_I2C_TOP_ADDR, 0x1f, 0x342c, },
55 { S5H1411_I2C_TOP_ADDR, 0x24, 0x0231, },
56 { S5H1411_I2C_TOP_ADDR, 0x25, 0x1011, },
57 { S5H1411_I2C_TOP_ADDR, 0x26, 0x0f07, },
58 { S5H1411_I2C_TOP_ADDR, 0x27, 0x0f04, },
59 { S5H1411_I2C_TOP_ADDR, 0x28, 0x070f, },
60 { S5H1411_I2C_TOP_ADDR, 0x29, 0x2820, },
61 { S5H1411_I2C_TOP_ADDR, 0x2a, 0x102e, },
62 { S5H1411_I2C_TOP_ADDR, 0x2b, 0x0220, },
63 { S5H1411_I2C_TOP_ADDR, 0x2e, 0x0d0e, },
64 { S5H1411_I2C_TOP_ADDR, 0x2f, 0x1013, },
65 { S5H1411_I2C_TOP_ADDR, 0x31, 0x171b, },
66 { S5H1411_I2C_TOP_ADDR, 0x32, 0x0e0f, },
67 { S5H1411_I2C_TOP_ADDR, 0x33, 0x0f10, },
68 { S5H1411_I2C_TOP_ADDR, 0x34, 0x170e, },
69 { S5H1411_I2C_TOP_ADDR, 0x35, 0x4b10, },
70 { S5H1411_I2C_TOP_ADDR, 0x36, 0x0f17, },
71 { S5H1411_I2C_TOP_ADDR, 0x3c, 0x1577, },
72 { S5H1411_I2C_TOP_ADDR, 0x3d, 0x081a, },
73 { S5H1411_I2C_TOP_ADDR, 0x3e, 0x77ee, },
74 { S5H1411_I2C_TOP_ADDR, 0x40, 0x1e09, },
75 { S5H1411_I2C_TOP_ADDR, 0x41, 0x0f0c, },
76 { S5H1411_I2C_TOP_ADDR, 0x42, 0x1f10, },
77 { S5H1411_I2C_TOP_ADDR, 0x4d, 0x0509, },
78 { S5H1411_I2C_TOP_ADDR, 0x4e, 0x0a00, },
79 { S5H1411_I2C_TOP_ADDR, 0x50, 0x0000, },
80 { S5H1411_I2C_TOP_ADDR, 0x5b, 0x0000, },
81 { S5H1411_I2C_TOP_ADDR, 0x5c, 0x0008, },
82 { S5H1411_I2C_TOP_ADDR, 0x57, 0x1101, },
83 { S5H1411_I2C_TOP_ADDR, 0x65, 0x007c, },
84 { S5H1411_I2C_TOP_ADDR, 0x68, 0x0512, },
85 { S5H1411_I2C_TOP_ADDR, 0x69, 0x0258, },
86 { S5H1411_I2C_TOP_ADDR, 0x70, 0x0004, },
87 { S5H1411_I2C_TOP_ADDR, 0x71, 0x0007, },
88 { S5H1411_I2C_TOP_ADDR, 0x76, 0x00a9, },
89 { S5H1411_I2C_TOP_ADDR, 0x78, 0x3141, },
90 { S5H1411_I2C_TOP_ADDR, 0x7a, 0x3141, },
91 { S5H1411_I2C_TOP_ADDR, 0xb3, 0x8003, },
92 { S5H1411_I2C_TOP_ADDR, 0xb5, 0xa6bb, },
93 { S5H1411_I2C_TOP_ADDR, 0xb6, 0x0609, },
94 { S5H1411_I2C_TOP_ADDR, 0xb7, 0x2f06, },
95 { S5H1411_I2C_TOP_ADDR, 0xb8, 0x003f, },
96 { S5H1411_I2C_TOP_ADDR, 0xb9, 0x2700, },
97 { S5H1411_I2C_TOP_ADDR, 0xba, 0xfac8, },
98 { S5H1411_I2C_TOP_ADDR, 0xbe, 0x1003, },
99 { S5H1411_I2C_TOP_ADDR, 0xbf, 0x103f, },
100 { S5H1411_I2C_TOP_ADDR, 0xce, 0x2000, },
101 { S5H1411_I2C_TOP_ADDR, 0xcf, 0x0800, },
102 { S5H1411_I2C_TOP_ADDR, 0xd0, 0x0800, },
103 { S5H1411_I2C_TOP_ADDR, 0xd1, 0x0400, },
104 { S5H1411_I2C_TOP_ADDR, 0xd2, 0x0800, },
105 { S5H1411_I2C_TOP_ADDR, 0xd3, 0x2000, },
106 { S5H1411_I2C_TOP_ADDR, 0xd4, 0x3000, },
107 { S5H1411_I2C_TOP_ADDR, 0xdb, 0x4a9b, },
108 { S5H1411_I2C_TOP_ADDR, 0xdc, 0x1000, },
109 { S5H1411_I2C_TOP_ADDR, 0xde, 0x0001, },
110 { S5H1411_I2C_TOP_ADDR, 0xdf, 0x0000, },
111 { S5H1411_I2C_TOP_ADDR, 0xe3, 0x0301, },
371 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 0); in s5h1411_softreset()
372 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf7, 1); in s5h1411_softreset()
384 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x10d5); in s5h1411_set_if_freq()
385 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x5342); in s5h1411_set_if_freq()
389 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1225); in s5h1411_set_if_freq()
390 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x1e96); in s5h1411_set_if_freq()
394 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x14bc); in s5h1411_set_if_freq()
395 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0xb53e); in s5h1411_set_if_freq()
404 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4); in s5h1411_set_if_freq()
405 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x39, 0x3655); in s5h1411_set_if_freq()
422 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xbe) & 0xcfff; in s5h1411_set_mpeg_timing()
442 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbe, val); in s5h1411_set_mpeg_timing()
451 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x24) & ~0x1000; in s5h1411_set_spectralinversion()
457 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x24, val); in s5h1411_set_spectralinversion()
466 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xbd) & ~0x100; in s5h1411_set_serialmode()
471 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xbd, val); in s5h1411_set_serialmode()
491 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x71); in s5h1411_enable_modulation()
492 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x00); in s5h1411_enable_modulation()
493 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0xf1); in s5h1411_enable_modulation()
500 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x00, 0x0171); in s5h1411_enable_modulation()
501 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf6, 0x0001); in s5h1411_enable_modulation()
503 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xcd, 0x00f0); in s5h1411_enable_modulation()
524 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1); in s5h1411_i2c_gate_ctrl()
526 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 0); in s5h1411_i2c_gate_ctrl()
536 val = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xe0) & ~0x02; in s5h1411_set_gpio()
539 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0, in s5h1411_set_gpio()
542 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xe0, val); in s5h1411_set_gpio()
552 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 1); in s5h1411_set_powerstate()
554 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf4, 0); in s5h1411_set_powerstate()
572 return s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf3, 0); in s5h1411_register_reset()
663 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf0); in s5h1411_read_status()
671 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf2); in s5h1411_read_status()
677 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x53); in s5h1411_read_status()
766 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf1); in s5h1411_read_snr()
769 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xf1); in s5h1411_read_snr()
772 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, in s5h1411_read_snr()
821 *ucblocks = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0xc9); in s5h1411_read_ucblocks()
875 reg = s5h1411_readreg(state, S5H1411_I2C_TOP_ADDR, 0x05); in s5h1411_attach()
892 s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0xf5, 1); in s5h1411_attach()