Lines Matching refs:dcfg
88 const struct imx_mu_dcfg *dcfg; member
158 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_tx_waiting_write()
159 can_write = status & IMX_MU_xSR_TEn(priv->dcfg->type, idx % 4); in imx_mu_tx_waiting_write()
168 imx_mu_write(priv, val, priv->dcfg->xTR + (idx % 4) * 4); in imx_mu_tx_waiting_write()
182 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_rx_waiting_read()
183 can_read = status & IMX_MU_xSR_RFn(priv->dcfg->type, idx % 4); in imx_mu_rx_waiting_read()
192 *val = imx_mu_read(priv, priv->dcfg->xRR + (idx % 4) * 4); in imx_mu_rx_waiting_read()
204 val = imx_mu_read(priv, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
207 imx_mu_write(priv, val, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
221 imx_mu_write(priv, *arg, priv->dcfg->xTR + cp->idx * 4); in imx_mu_generic_tx()
222 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
225 imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
241 dat = imx_mu_read(priv, priv->dcfg->xRR + (cp->idx) * 4); in imx_mu_generic_rx()
250 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_generic_rxdb()
251 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_generic_rxdb()
264 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_tx()
291 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
293 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_TSR], in imx_mu_specific_tx()
295 xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr), in imx_mu_specific_tx()
301 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
304 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_specific_tx()
323 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, 0)); in imx_mu_specific_rx()
324 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_specific_rx()
326 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_rx()
340 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_RSR], xsr, in imx_mu_specific_rx()
341 xsr & IMX_MU_xSR_RFn(priv->dcfg->type, i % 4), 0, in imx_mu_specific_rx()
347 *data++ = imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_specific_rx()
350 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, 0), 0); in imx_mu_specific_rx()
386 imx_mu_write(priv, *arg++, priv->dcfg->xTR); in imx_mu_seco_tx()
391 IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_seco_tx()
397 priv->dcfg->xTR + (i % 4) * 4); in imx_mu_seco_tx()
436 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_seco_rxdb()
456 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_seco_rxdb()
457 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_seco_rxdb()
491 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_TCR]); in imx_mu_isr()
492 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_isr()
493 val &= IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
494 (ctrl & IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
497 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_RCR]); in imx_mu_isr()
498 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_isr()
499 val &= IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
500 (ctrl & IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
503 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_GIER]); in imx_mu_isr()
504 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_isr()
505 val &= IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
506 (ctrl & IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
519 if ((val == IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
521 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
523 } else if ((val == IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
525 priv->dcfg->rx(priv, cp); in imx_mu_isr()
526 } else if ((val == IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
528 priv->dcfg->rxdb(priv, cp); in imx_mu_isr()
545 return priv->dcfg->tx(priv, cp, data); in imx_mu_send_data()
567 if (!(priv->dcfg->type & IMX_MU_V2_IRQ)) in imx_mu_startup()
578 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
581 imx_mu_xcr_rmw(priv, IMX_MU_GIER, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
605 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
608 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
611 imx_mu_xcr_rmw(priv, IMX_MU_GIER, 0, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
614 imx_mu_xcr_rmw(priv, IMX_MU_CR, IMX_MU_xCR_RST(priv->dcfg->type), 0); in imx_mu_shutdown()
615 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_SR], sr, in imx_mu_shutdown()
616 !(sr & IMX_MU_xSR_RST(priv->dcfg->type)), 1, 5); in imx_mu_shutdown()
737 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_generic()
740 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
741 imx_mu_write(priv, val, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
745 imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_init_generic()
751 int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; in imx_mu_init_specific()
769 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_specific()
783 const struct imx_mu_dcfg *dcfg; in imx_mu_probe() local
797 dcfg = of_device_get_match_data(dev); in imx_mu_probe()
798 if (!dcfg) in imx_mu_probe()
800 priv->dcfg = dcfg; in imx_mu_probe()
801 if (priv->dcfg->type & IMX_MU_V2_IRQ) { in imx_mu_probe()
817 if (priv->dcfg->type & IMX_MU_V2_S4) in imx_mu_probe()
842 priv->dcfg->init(priv); in imx_mu_probe()
985 priv->xcr[i] = imx_mu_read(priv, priv->dcfg->xCR[i]); in imx_mu_suspend_noirq()
1006 if (!priv->clk && !imx_mu_read(priv, priv->dcfg->xCR[0])) { in imx_mu_resume_noirq()
1008 imx_mu_write(priv, priv->xcr[i], priv->dcfg->xCR[i]); in imx_mu_resume_noirq()