581 	out_8(&via2[B], in_8(&via2[B]) | TREQ);  in init_pmu()
582 	out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);  in init_pmu()
1190 	while ((in_8(&via2[B]) & TACK) == 0) {  in wait_for_ack()
1204 	out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);  in send_byte()
1206 	out_8(&via2[B], in_8(&via2[B]) & ~TREQ);	/* assert TREQ */  in send_byte()
1207 	(void)in_8(&via2[B]);  in send_byte()
1213 	out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);  in recv_byte()
1214 	in_8(&via1[SR]);		/* resets SR */  in recv_byte()
1215 	out_8(&via2[B], in_8(&via2[B]) & ~TREQ);  in recv_byte()
1216 	(void)in_8(&via2[B]);  in recv_byte()
1475 	if (in_8(&via2[B]) & TREQ) {  in pmu_sr_intr()
1476 		printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));  in pmu_sr_intr()
1480 	while ((in_8(&via2[B]) & TACK) != 0)  in pmu_sr_intr()
1485 		bite = in_8(&via1[SR]);  in pmu_sr_intr()
1488 	out_8(&via2[B], in_8(&via2[B]) | TREQ);  in pmu_sr_intr()
1595 			intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);  in via_pmu_interrupt()
1614 			       intr, in_8(&via1[IER]), pmu_state);  in via_pmu_interrupt()
1700 	if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {  in gpio1_interrupt()
1835 	save_via[0] = in_8(&via1[ANH]);  in save_via_state()
1836 	save_via[1] = in_8(&via1[DIRA]);  in save_via_state()
1837 	save_via[2] = in_8(&via1[B]);  in save_via_state()
1838 	save_via[3] = in_8(&via1[DIRB]);  in save_via_state()
1839 	save_via[4] = in_8(&via1[PCR]);  in save_via_state()
1840 	save_via[5] = in_8(&via1[ACR]);  in save_via_state()
1841 	save_via[6] = in_8(&via1[T1CL]);  in save_via_state()
1842 	save_via[7] = in_8(&via1[T1CH]);  in save_via_state()